| 大会名称 |
|---|
| 2016年 情報科学技術フォーラム(FIT) |
| 大会コ－ド |
| F |
| 開催年 |
| 2016 |
| 発行日 |
| 2016-08-23 |
| セッション番号 |
| 7B |
| セッション名 |
| システムとLSIの設計技術 |
| 講演日 |
| 2016/09/09 |
| 講演場所(会議室等) |
| 共通教育棟E棟3階E33 |
| 講演番号 |
| C-024 |
| タイトル |
| A Fast Symmetrical Routing Algorithm based on Max-Flow Method |
| 著者名 |
| Zijiao Zhang, Tieyuan Pan, Takahiro Watanabe, |
| キーワード |
| VLSI, routing, symmetry, Max-flow algorithm |
| 抄録 |
| In VLSI design, we often consider the routing for some special nets under the restrictions, such as length-matching and symmetry. The symmetrical routing is especially operated between the routing for the bus and the clock lines and the routing for most of the others without the priority. In this paper, the symmetrical routing algorithm based on Max-flow method is proposed for several nets routing in the multilayer. Moreover, the symmetrical rate is proposed for evaluating the rate of symmetrical proportion of length, bends and direction between corresponding nets in symmetrical routing. Experimental results show that the proposed algorithm has high symmetrical rate and efficiency and reduces the routing time. |
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