| 大会名称 |
|---|
| 2009年 情報科学技術フォーラム(FIT) |
| 大会コ－ド |
| F |
| 開催年 |
| 2009 |
| 発行日 |
| 2009/8/20 |
| セッション番号 |
| 7C |
| セッション名 |
| ディペンダブルシステム |
| 講演日 |
| 2009/09/04 |
| 講演場所(会議室等) |
| C会場（9号館1F 913教室） |
| 講演番号 |
| RC-014 |
| タイトル |
| A Feasibility Study of Active Current Testing |
| 著者名 |
| 三浦 幸也, |
| キーワード |
| CMOS circuits, current testing, fault detection, input signal, ramp voltage |
| 抄録 |
|
This paper proposes a new current testing method, active current testing, for detecting various fault classes of CMOS circuits. The proposed method is an extended method of VDD ramp testing, and it is carried out by applying various input signals for the circuit under test. If a power supply current is measured by changing both a power supply voltage and an input signal, we can make the internal condition of a circuit various. Then, fault detection by current testing becomes more effective than conventional VDD ramp testing. We apply active current testing to two CMOS circuits, an operational amplifier and a level shifter, and demonstrate its fault detection ability. Except for the special case of circuit behavior, we found that active current testing can detect both hard faults (i.e., short and open faults) and soft faults (i.e., process variations and reliability degradation). |
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