エレクトロニクス-電子デバイス(開催日：2002/06/24)

タイトル/著者/発表日/資料番号
Study on the Crosstalks at Interconnects of Integrated Circuits by FDTD-PML

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[発表日]2002/6/24
[資料番号]ED2002-134
Modeling of Interconnect Line Using ADI-FDTD Method

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[発表日]2002/6/24
[資料番号]ED2002-135
The C-R Method Used for Leff Extraction and Process Optimization in Nano N/P-MOSFET's Devices

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[発表日]2002/6/24
[資料番号]ED2002-136
An Accurate Two-dimensional Semiconductor Device Analysis using Finite-Element Method

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[発表日]2002/6/24
[資料番号]ED2002-137
SON-MOSFETの作製とULSIへの応用

佐藤 力,  新居 英明,  幡野 正之,  竹中 圭一,  林 久貴,  石行 一貴,  平野 智之,  井田 和彦,  青木 伸俊,  大黒 達也,  井納 和美,  水島 一郎,  綱島 祥隆,  

[発表日]2002/6/24
[資料番号]ED2002-138
Effect of Nanotopography on Chemical Mechanical Polishing : Polishing Depth, Pad, Slurry and Interlayer Film Dependencies

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[発表日]2002/6/24
[資料番号]ED2002-139
Formation of [111] Preferentially Oriented Cu Layer on [110] Nb Barrier on SiO_2

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[発表日]2002/6/24
[資料番号]ED2002-140
Characteristics of pulse plasma enhanced atomic layer deposition of tungsten nitride diffusion barrier for copper interconnect

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[発表日]2002/6/24
[資料番号]ED2002-141
Formation of Ti-capped NiSi and its Barrier Properties against Cu Diffusion

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[発表日]2002/6/24
[資料番号]ED2002-142
Effect of hexamethyldisilazane on the electrical characteristics of a porous silica thin film

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[発表日]2002/6/24
[資料番号]ED2002-143
The Electrical Characteristics of Deep Metal Contact to P+Active in MDL (Merged DRAM and Logic) Interconnection Application

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[発表日]2002/6/24
[資料番号]ED2002-144
Effect of Time-varying Axial Magnetic Field on High Aspect Ratio SiO_2 Etching in an Inductively Coupled Plasma

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[発表日]2002/6/24
[資料番号]ED2002-145
Study of the Thermally Stimulated Current (TSC) characteristics of (Ba,Sr)TiO_3 Thin Films

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[発表日]2002/6/24
[資料番号]ED2002-146
CVD法によるゲート絶縁膜用HfO_2薄膜の作製

中山 誠,  高橋 健治,  舟窪 浩,  徳光 永輔,  

[発表日]2002/6/24
[資料番号]ED2002-147
Effect of hydrogen annealing on electrical properties of Bi-layered perovskite thin films

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[発表日]2002/6/24
[資料番号]ED2002-148
リモートプラズマ酸化法を用いた極薄シリコン酸化膜の低温形成およびMOSFETゲート絶縁膜への応用

孫 雲華,  飯田 倫之,  木本 恒暢,  松波 弘之,  

[発表日]2002/6/24
[資料番号]ED2002-149
Cat-CVD装置を用いたULSI材料の表面窒化とエッチング

和泉 亮,  三木 翼,  松村 英樹,  

[発表日]2002/6/24
[資料番号]ED2002-150
多結晶シリコン薄膜トランジスタの特性解析とシミュレーション

木村 睦,  井上 聡,  下田 達也,  

[発表日]2002/6/24
[資料番号]ED2002-151
Novel Device Transfer Technology by Backside Etching (DTTBE) for High Performance Poly-Si TFTs on Plastic Substrate

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[発表日]2002/6/24
[資料番号]ED2002-152
The effect of interface trap charges on poly-Si TFT

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[発表日]2002/6/24
[資料番号]ED2002-153
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