IEICE Technical Committee

Electronics-Electron Devices(Date:2002/06/24)

Presentation

Study on the Crosstalks at Interconnects of Integrated Circuits by FDTD-PML

Yountae Kim, Ohseob Kwon, Taeyoung Won,

[Date]2002/6/24
[Paper #]ED2002-134

Modeling of Interconnect Line Using ADI-FDTD Method

Ikjoon Choi, Taeyoung Won,

[Date]2002/6/24
[Paper #]ED2002-135

The C-R Method Used for Leff Extraction and Process Optimization in Nano N/P-MOSFET's Devices

Heng-Sheng Huang, Chi-Chin Hu, Chien-Tung Yuen, Jen-Hung Fang, Hsin-Nan Chen, Jwo Shiun Sun, J. K. Chen, Garry Hong,

[Date]2002/6/24
[Paper #]ED2002-136

An Accurate Two-dimensional Semiconductor Device Analysis using Finite-Element Method

Sechun Park, Sukin Yoon, Taeyoung Won,

[Date]2002/6/24
[Paper #]ED2002-137

Fabrication of SON(Silicon on Nothing)-MOSFET and Its ULSI Applications

Tsutomu SATO, Hideaki NII, Masayuki HATANO, Keiichi TAKENAKA, Hisataka HAYASHI, Kazutaka ISHIGO, Tomoyuki HIRANO, Kazuhiko IDA, Nobutoshi AOKI, Tatsuya OHGURO, Kazumi INO, Ichiro MIZUSHIMA, Yoshitaka TSUNASHIMA,

[Date]2002/6/24
[Paper #]ED2002-138

Effect of Nanotopography on Chemical Mechanical Polishing : Polishing Depth, Pad, Slurry and Interlayer Film Dependencies

Jea-gun PARK, Takeo KATOH, Jin-hyung PARK, Ungyu PAIK, Kae-dal KWACK,

[Date]2002/6/24
[Paper #]ED2002-139

Formation of [111] Preferentially Oriented Cu Layer on [110] Nb Barrier on SiO_2

Md. MANIRUZZAMAN, Mayumi B. TAKEYAMA, Atsushi NOYA,

[Date]2002/6/24
[Paper #]ED2002-140

Characteristics of pulse plasma enhanced atomic layer deposition of tungsten nitride diffusion barrier for copper interconnect

Yong Tae Kim, Hyunsang Sim,

[Date]2002/6/24
[Paper #]ED2002-141

Formation of Ti-capped NiSi and its Barrier Properties against Cu Diffusion

Soo-Jin Park, Keun-Woo Lee, Ju-Youn Kim, Kyoo-Sik Bae,

[Date]2002/6/24
[Paper #]ED2002-142

Effect of hexamethyldisilazane on the electrical characteristics of a porous silica thin film

S. Sakamoto, K. Komura, T. Kikkawa,

[Date]2002/6/24
[Paper #]ED2002-143

The Electrical Characteristics of Deep Metal Contact to P+Active in MDL (Merged DRAM and Logic) Interconnection Application

JaeHan Cha, YoonJang Kim, JungHwan Lee,

[Date]2002/6/24
[Paper #]ED2002-144

Effect of Time-varying Axial Magnetic Field on High Aspect Ratio SiO_2 Etching in an Inductively Coupled Plasma

Ho-Young Song, Yong-Hee Choi, Se-Geun Park, Beom-hoan O, Jin-Sung Oh, Jin-Woong Kim,

[Date]2002/6/24
[Paper #]ED2002-145

Study of the Thermally Stimulated Current (TSC) characteristics of (Ba,Sr)TiO_3 Thin Films

Yong-Ju Kim, Hee Chul Lee, Min-Sung Choi, Ki-Seon Lee,

[Date]2002/6/24
[Paper #]ED2002-146

Preparation of HfO_2 thin films by chemical vapor deposition for gate-insulator applications

Makoto NAKAYAMA, Kenji TAKAHASHI, Hiroshi FUNAKUBO, Eisuke TOKUMITSU,

[Date]2002/6/24
[Paper #]ED2002-147

Effect of hydrogen annealing on electrical properties of Bi-layered perovskite thin films

Chun Keun Kim, Ik-Soo Kim, Hoon Sang Choi, Seong-Il Kim, Chang Woo Lee, Yong Tae Kim,

[Date]2002/6/24
[Paper #]ED2002-148

Formation of Ultra-thin Silicon Dioxide Films at Low Temperatures using Remote Plasma Oxidation and Application for Gate Insulators

Y.H. Sun, T. Iida, T. Kimoto, H. Matsunami,

[Date]2002/6/24
[Paper #]ED2002-149

Surface nitridation and etching of ULSI related materials using a Cat-CVD system

Akira Izumi, Tsubasa Miki, Hideki Matsumura,

[Date]2002/6/24
[Paper #]ED2002-150

Characterization and Simulation of Polycrystalline-Silicon Thin-Film Transistors

Mutsumi KIMURA, Satoshi INOUE, Tatsuya SHIMODA,

[Date]2002/6/24
[Paper #]ED2002-151

Novel Device Transfer Technology by Backside Etching (DTTBE) for High Performance Poly-Si TFTs on Plastic Substrate

Ching-Fa Yeh, Shuo-Cheng Wang, Chien-Kai Huang, Yuan-Tung Dai,

[Date]2002/6/24
[Paper #]ED2002-152

The effect of interface trap charges on poly-Si TFT

Kook Chul Moon, Min-Chul Lee, Jae-Hoon Lee, Min-Koo Han,

[Date]2002/6/24
[Paper #]ED2002-153