number | title/author |
---|---|
B1L-E1 | A mathematical-structure-based aVLSI silicon neuron model Takashi Kohno, Kazuyuki Aihara, |
B1L-E2 | Circuit Implementation of an A/D Converter Based on the Negative β-Map with a Discrete-Time Integrator Yoshihiko Horio, Kenya Jin’no, Tohru Kohda, Kazuyuki Aihara, |
B1L-E3 | Digital-Signal-Waveform Improvement for High-Speed VLSI Packaging Moritoshi Yasunaga, Hiroshi Nakayama, Yuki Shimauchi, Ikuo Yoshihara, |
B1L-E4 | Realization of Three-dimensional DT-CNN on FPGA Nguyen Tien Dat, Nguyen Tien Dzung, Thang Manh Hoang, |
B1L-E5 | Implementation of CNN-based FFT/IFFT Algorithms on FPGA Hiep Hoang Le, Nguyen Tien Dzung, Thang Manh Hoang, |