number | title/author |
---|---|
E4-1 | Multiple-Valued Logic Clock Converter Networks Ali Massoud Haidar, Nawar El Ahdab, Hiroyuki Shirahama, Ali Alaeldine, |
E4-2 | A Novel Neural Network Ternary Arithmetic Logic Unit Ali Massoud Haidar, Mohammad Jad Hamdan, Mohammad Backer Rashid, Hassan A. Hamieh, Ahmad A. Issa, Abdallah Kassem, |
E4-3 | Low-Power CMOS CNN Cell and its Application to an Oscillatory CNN Hisashi Tanaka, Koichi Tanno, Hiroki Tamura, Kenji Murao, |
E4-4 | Network on Chips Structure for Mapping Two Hidden Layers BP-ANNs Yiping Dong, Takahiro Watanabe, |
E4-5 | Adaptive Noise Reduction Filter for Speech Using Cascaded Sandglass-type Neural Network Hiroki Yoshimura, Tadaaki Shimizu, Toshie Matumura, Masaya Kimoto, Naoki Isu, |