Summary
IEICE Information and Communication Technology Forum
2016
Session Number:A4
Session:
Number:A4-3
The Effect of Using Multiple Code Rates on NVM-based Storage Systems
Theodore Antonakopoulos, Stelios Korkotsides,
pp.-
Publication Date:2016-10-01
Online ISSN:2188-5079
DOI:10.34385/proc.24.A4-3
PDF download (391.7KB)
Summary:
NV memories continue to increase their density in order to achieve higher storage capacity, but more powerfulError Correction Codes have to be used in order to achieve the required data reliability. LDPC codes provide a viable solution to this problem, at the cost of higher complexity and power consumption, which constraints most NVM devices to use a fixed LDPC rate. In the this work, we present an architecture of a NVM-based storage system that maximizes its lifetime by dynamically adapting the LDPC’s rate according to the aging condition of its devices. Furthermore, we have developed a queuing-based model in order to study the effect of different implementation choices on the system’s I/O performance.