Electronics-Silicon Devices and Materials(Date:2003/01/31)

Presentation
表紙

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[Date]2003/1/31
[Paper #]
目次

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[Date]2003/1/31
[Paper #]
Al CVD Technology using MPA (methylpyrrolidine alane)

Manabu Sakamoto,  Kazuya Masu,  Eri Sugimoto,  Jin Il Lee,  Masanobu Hatanaka,  Yoshikazu Takahashi,  Michio Ishikawa,  Yuji Furumura,  

[Date]2003/1/31
[Paper #]SDM2002-227
Selective silicidation of Co using SiH_4/Si_2H_6 to form CoSi layer for anti-oxidation barrier layer of Cu metallization

Yukihiro SHIMOGAKI,  Rika HIRAI,  Suguru NODA,  Hiroshi KOMIYAMA,  

[Date]2003/1/31
[Paper #]SDM2002-228
Influence of Wafer-Backside Copper Contamination during Wiring Process on Device Reliability

K. Hozawa,  J. Yugami,  

[Date]2003/1/31
[Paper #]SDM2002-229
Parastic Resistance Modeling of Spiral Inductors on High-resistive SOI Substrate

Tatsuji NISHIJIMA,  Yoshiyuki SHIMIZU,  Hideki SHIMA,  Toshimasa MATSUOKA,  Kenji TANIGUCHI,  

[Date]2003/1/31
[Paper #]SDM2002-230
Development of the RF Variable Inductor in LSI

Yoshisato Yokoyama,  Takashi Fukushigel,  Seiichi Hata,  Kazuya Masu,  Akira Shimokohbe,  

[Date]2003/1/31
[Paper #]SDM2002-231
Influences of Si and Low-k Substrates on Antenna Transmission Gain for on-Chip Wireless Interconnects

S. Watanab,  A.B.M. H.Rashid,  T. Kikkawa,  

[Date]2003/1/31
[Paper #]SDM2002-232
SiP Technology will have to go together with Globa Circuit Design : ASET E-SI Technology R&D and Application created by Global SiP (Packaging)

Manabu Bonkohara,  

[Date]2003/1/31
[Paper #]SDM2002-233
Three Dimensional Integration with Wafer Bonding Technology (Packaging)

Hiroyuki KURINO,  Tomonori NAKAMURA,  Mitsumasa KOYANAGI,  

[Date]2003/1/31
[Paper #]SDM2002-234
IC Metallization using Supercritical Fluids

Eiichi KONDOH,  

[Date]2003/1/31
[Paper #]SDM2002-235
Electroless Plating of Copper on Metal-Nitride Diffusion Barriers Initiated by Displacement Reaction

Shoso Shingubara,  Zenling Wang,  Osamu Yaegashi,  Hiroyuki Sakaue,  Takayuki Takahagi,  

[Date]2003/1/31
[Paper #]SDM2002-236
Fabrication of Low Dielectric Porous Diamond Film Composed of Diamond Nano-particles

Hiroyuki SAKAUE,  Sachiko ISHIKAWA,  Hiroyuki TOMIMOTO,  Shoso SHINGUBARA,  Takayuki TAKAHAGI,  

[Date]2003/1/31
[Paper #]SDM2002-237
Evaluation of low-k porous silica films incorporated with ethylene groups.

Yasutaka UCHIDA,  Takashi KATOH,  Masako OIKAWA,  

[Date]2003/1/31
[Paper #]SDM2002-238
Low-k Organic Film In-situ surface-modification etching technology for the Cu/Low-k interconncects

H. OHTAKE,  S. SAITO,  M. TADA,  Y. HARADA,  T. ONODERA,  Y. HAYASHI,  

[Date]2003/1/31
[Paper #]SDM2002-239
Time-Dependent Dielectric-Constant Increase (TDDI) of Low-k Materials under Electric-Field Stress

Daisuke RYUZAKI,  Takeshi ISHIDA,  Takeshi FURUSAWA,  

[Date]2003/1/31
[Paper #]SDM2002-240
CMOS LSIにおけるCu配線のストレスボイディング現象 : via直下に出来るストレスボイドと配線レイアウトとの関係

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[Date]2003/1/31
[Paper #]SDM2002-241
Suppression of Stress-Induced Voiding in Copper Interconnects

Takayuki OSHIMA,  Hizuru YAMAGUCHI,  Hideo AOKI,  Tatsuyuki SAITO,  Kensuke ISHIKAWA,  Kenji HINODE,  

[Date]2003/1/31
[Paper #]SDM2002-242
Suppression of Stress Induced Open Failures between Via and Cu Wide Line by Inserting Ti Layer under Ta/TaN Barrier

Makoto UEKI,  Masayuki HIROI,  Nobuyuki IKARASHI,  Takahiro ONODERA,  Naoya FURUTAKE,  Masayuki YOSHIKI,  Yoshihiro HAYASHI,  

[Date]2003/1/31
[Paper #]SDM2002-243
複写される方へ

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[Date]2003/1/31
[Paper #]
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