Information and Systems-Reconfigurable Systems(Date:2008/05/15)

Presentation
表紙

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[Date]2008/5/15
[Paper #]
目次

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[Date]2008/5/15
[Paper #]
A Study of a Fault-Tolerant System using Partial Reconfiguration

Atsuhiro KANAMARU,  Hiroyuki KAWAI,  Yoshiki YAMAGUCHI,  Moritoshi YASUNAGA,  

[Date]2008/5/15
[Paper #]RECONF2008-1
An Implementation of High Precision Floating-point Operation Units on FPGA

Naohito NAKASATO,  Tadashi ISHIKAWA,  

[Date]2008/5/15
[Paper #]RECONF2008-2
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems

Yohei HORI,  Akashi SATOH,  Hirofumi SAKANE,  Kenji TODA,  

[Date]2008/5/15
[Paper #]RECONF2008-3
FPGA Implementation of Elliptic Curve Arithmetic in Characteristic Five by High-level Synthesis

YoungKwang MOON,  Hideyuki TSUCHIYA,  Yuichiro SHIBATA,  Ryuichi HARASAWA,  Kiyoshi OGURI,  

[Date]2008/5/15
[Paper #]RECONF2008-4
Development of Compiler for Dynamic Reconfigurable Architecture DS-HIE which Adopts Digit-serial Computation

Yasuhiro NISHINAGA,  Takuro UCHIDA,  Tetsuya ZUYAMA,  Kazuya TANIGAWA,  Tetsuo HIRONAKA,  

[Date]2008/5/15
[Paper #]RECONF2008-5
Path planning method for MIMD controlled data communication in MX Core

Akihiro KODAMA,  Yuta MIZOKAMI,  Mitsutaka NAKANO,  Masahiro IIDA,  Toshinori SUEYOSHI,  

[Date]2008/5/15
[Paper #]RECONF2008-6
A Link Removal Methodology for Application-Specific Networks-on-chip on FPGAs

Daihan WANG,  Hiroki MATSUTANI,  Michihiro KOIBUCHI,  Hideharu AMANO,  

[Date]2008/5/15
[Paper #]RECONF2008-7
A Novel Cluster Structure for Variable Grain Logic Cell

Kazuki INOUE,  Kazunori MATSUYAMA,  Yoshiaki SATOU,  Masahiro KOGA,  Motoki AMAGASAKI,  Masahiro IIDA,  Toshinori SUEYOSHI,  

[Date]2008/5/15
[Paper #]RECONF2008-8
RadidMatriX : 2D Array Processor for Algebraic Path Problem

Toshiaki MIYAZAKI,  

[Date]2008/5/15
[Paper #]RECONF2008-9
Designing And Evaluating Dynamically Reconfigurable Processor With Power Gating Technique

Yoshiki SAITO,  Tomoaki SHIRAI,  Takuro NAKAMURA,  Takashi NISHIMURA,  Yohei HASEGAWA,  Satoshi TSUTSUMI,  Toshihiro KASHIMA,  Mitsutaka NAKATA,  Seidai TAKEDA,  Kimiyoshi USAMI,  Hideharu AMANO,  

[Date]2008/5/15
[Paper #]RECONF2008-10
A multi-context dynamic optically reconfigurable gate array using a silver-halide holographic memory

Daisaku SETO,  Minoru WATANABE,  

[Date]2008/5/15
[Paper #]RECONF2008-11
Fast optical reconfigurations of four-contexts ORGAs

Mao NAKAJIMA,  Minoru WATANABE,  

[Date]2008/5/15
[Paper #]RECONF2008-12
Feature Extraction from Stereo Images by FPGA-Based Stream Processing

Shinsuke NINO,  Hidenori MATSUBAYASHI,  Yuichiro SHIBATA,  Tsuyoshi HAMADA,  Kiyoshi OGURI,  

[Date]2008/5/15
[Paper #]RECONF2008-13
An Approach for Downscaling Images for Real-time Pattern Detection

Yoshifumi TANIDA,  Tsutomu MARUYAMA,  

[Date]2008/5/15
[Paper #]RECONF2008-14
How fast is an FPGA in image processing ?

Takashi SAEGUSA,  Tsutomu MARUYAMA,  Yoshiki YAMAGUCHI,  

[Date]2008/5/15
[Paper #]RECONF2008-15
An implementation of a watershed algorithm based on connected components on FPGA

KHAC TRIEU Dang BA,  Tsutomu MARUYAMA,  

[Date]2008/5/15
[Paper #]RECONF2008-16
Implementation and Evaluation of OS Functions for a Computer System Having FPGA Devices

Kazuya TOKUNAGA,  Akira KOJIMA,  Tetsuo HIRONAKA,  

[Date]2008/5/15
[Paper #]RECONF2008-17
Context Virtualization Techniques for Dynamically Reconfigurable Hardware

Takeshi INUO,  Kengo NISHINO,  Nobuki KAJIHARA,  

[Date]2008/5/15
[Paper #]RECONF2008-18
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