IEICE Technical Committee

Electronics-Integrated Circuits and Devices(Date:2017/11/06)

Presentation

Taisei Segawa(Nagasaki Univ.), Yuichiro Shibata(Nagasaki Univ.), Masaharu Tanaka(Nagasaki Univ.), Kenichi Morimoto(Nagasaki Univ.), Hidenori Maruta(Nagasaki Univ.), Fujio Kurokawa(Nagasaki inst. of Applied Sci.),

[Date]2017-11-07
[Paper #]RECONF2017-44

Performance Evaluation Three Dimensional FPGA Architecture with Face-down Stacking

Keishiro Akashi(Kumamoto Univ), Motoki Amagasaki(Kumamoto Univ), Qian Zhao(Kumamoto Univ), Masahiro Iida(Kumamoto Univ), Morihiro Kuga(Kumamoto Univ), Toshinori Sueyoshi(Kumamoto Univ),

[Date]2017-11-07
[Paper #]RECONF2017-42

Low Voltage Operation Boost Converter for ReRAM/NAND Flash Memory Hybrid SSD

Kenta Suzuki(Chuo Univ.), Kota Tsurumi(Chuo Univ.), Ken Takeuchi(Chuo Univ.),

[Date]2017-11-07
[Paper #]CPM2017-82,ICD2017-41,IE2017-67

Prospects of an Error-Correction Technique of Intra-Chip Data Transmission Using Time-Series Feature

Kentaro Kato(Tohoku Univ.), Masanori Natsui(Tohoku Univ.), Takahiro Hanyu(Tohoku Univ.),

[Date]2017-11-07
[Paper #]CPM2017-85,ICD2017-44,IE2017-70

Stochastic Number Generation with Internal Signals of Peripheral Logic Circuits

Naoya Kubota(Hiroshima City Univ.), Maki Fujiha(Hiroshima City Univ.), Hideyuki Ichihara(Hiroshima City Univ.), Tsuyoshi Iwagaki(Hiroshima City Univ.), Tomoo Inoue(Hiroshima City Univ.),

[Date]2017-11-07
[Paper #]VLD2017-47,DC2017-53

A Detection Method for Trojan Circuit inserted in Manufacturing Process

Yoshinobu Okuda(Kyoto Sangyo Univ.), Masayoshi Yoshimura(Kyoto Sangyo Univ.), Kohei Ohyama(Kyoto Sangyo Univ.),

[Date]2017-11-07
[Paper #]VLD2017-53,DC2017-59

Simulation Techniques for EMC Compliant Design of Automotive IC Chips and Modules

Akihiro Tsukioka(Kobe Univ.), Makoto Nagata(Kobe Univ.), Kohki Taniguchi(Kobe Univ.), Daisuke Fujimoto(Kobe Univ.), Rieko Akimoto(TOSHIBA), Takao Egami(TOSHIBA), Kenji Niinomi(TOSHIBA), Takeshi Yuhara(TOSHIBA), Sachio Hayashi(TOSHIBA), Rob Mathews(ANSYS), Karthik Srinivasan(ANSYS), Ying-Shiun Li(ANSYS), Norman Chang(ANSYS),

[Date]2017-11-07
[Paper #]CPM2017-84,ICD2017-43,IE2017-69

Flip-Flop Selection for Multi-Cycle Test with Partial Observation in Scan-Based Logic BIST

Shigeyuki Oshima(Kyutech), Takaaki Kato(Kyutech), Senling Wang(Ehime Univ.), Yasuo Sato(Kyutech), Seiji Kajihara(Kyutech),

[Date]2017-11-07
[Paper #]VLD2017-41,DC2017-47

FPGAのためのC-to-OpenCLトランスレータの試作

Yoshiki Ebisuhama(Hiroshima City Univ.), Atsushi Kubota(Hiroshima City Univ.), Kazuya Tanigawa(Hiroshima City Univ.), Tetsuo Hironaka(Hiroshima City Univ.),

[Date]2017-11-07
[Paper #]RECONF2017-43

IoT Platform using an MCU-FPGA Hybrid System and Feasibility Study of Wireless Configuration

Ryota Suzuki(TUAT), Hironori Nakajo(TUAT),

[Date]2017-11-07
[Paper #]RECONF2017-45

[Invited Talk] Innovative Applications of Machine Learning in Lithography and DFM

Tetsuaki Matsunawa(Toshiba Memory),

[Date]2017-11-07
[Paper #]VLD2017-50,DC2017-56

[Keynote Address] Theory and applications of dynamical sparse modeling

Masaaki Nagahara(Univ. of Kitakyushu),

[Date]2017-11-07
[Paper #]VLD2017-54,CPM2017-87,ICD2017-46,IE2017-72,CPSY2017-43,DC2017-60,RECONF2017-49

[Invited Talk] Accurate Color Reproduction using Multiband Image and Its Applications

Masaru Tsuchida(NTT), Kaoru Hiramatsu(NTT), Kunio Kashino(NTT),