Presentation 2017-11-07
Simulation Techniques for EMC Compliant Design of Automotive IC Chips and Modules
Akihiro Tsukioka, Makoto Nagata, Kohki Taniguchi, Daisuke Fujimoto, Rieko Akimoto, Takao Egami, Kenji Niinomi, Takeshi Yuhara, Sachio Hayashi, Rob Mathews, Karthik Srinivasan, Ying-Shiun Li, Norman Chang,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In recent years, electromagnetic compatibility (EMC) becomes a major concern among IC chips. EMC is characterized in two directions. Electromagnetic emission (EMI) is the noise generated by the operation of the device. EMI cause noise to propagate through the power traces or air and interfere with other devices. Electromagnetic susceptibility (EMS) is the noise tolerance of IC chip. Direct power injection (DPI) method is standardized in IEC62132-4 for EMS testing. We designed the local interconnect network (LIN) test chip in a 0.13 nm BiCD process, and compared the simulated and measured attenuation of propagating noise of DPI test. The chip-package-system (CPS) board analysis including the extended chip power model (ECPM) predicts the RF noise coupling injected the EMS test. This results benefit ICs designers grasp the root cause of EMS. Keywords Electromagnetic susceptibility, Electromagnetic immunity, Substrate coupling, Power delivery network, Direct power injection, Extended chip power model, Local interconnect network
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Electromagnetic susceptibility / Electromagnetic immunity / Substrate coupling / Power delivery network / Direct power injection / Extended chip power model / Local interconnect network
Paper # CPM2017-84,ICD2017-43,IE2017-69
Date of Issue 2017-10-30 (CPM, ICD, IE)

Conference Information
Committee VLD / DC / CPSY / RECONF / CPM / ICD / IE / IPSJ-SLDM / IPSJ-EMB / IPSJ-ARC
Conference Date 2017/11/6(3days)
Place (in Japanese) (See Japanese page)
Place (in English) Kumamoto-Kenminkouryukan Parea
Topics (in Japanese) (See Japanese page)
Topics (in English) Design Gaia 2017 -New Field of VLSI Design-
Chair Hiroyuki Ochi(Ritsumeikan Univ.) / Michiko Inoue(NAIST) / Koji Nakano(Hiroshima Univ.) / Masato Motomura(Hokkaido Univ.) / Fumihiko Hirose(Yamagata Univ.) / Hideto Hidaka(Renesas) / Takayuki Hamamoto(Tokyo Univ. of Science) / Kiyoharu Hamaguchi(Shimane Univ.) / 渡辺 晴美(東海大) / Masahiro Goshima(NII)
Vice Chair Noriyuki Minegishi(Mitsubishi Electric) / Satoshi Fukumoto(Tokyo Metropolitan Univ.) / Hidetsugu Irie(Univ. of Tokyo) / Takashi Miyoshi(Fujitsu) / Yuichiro Shibata(Nagasaki Univ.) / Kentaro Sano(Tohoku Univ.) / Mayumi Takeyama(Kitami Inst. of Tech.) / Makoto Nagata(Kobe Univ.) / Kazuya Kodama(NII) / Hideaki Kimata(NTT)
Secretary Noriyuki Minegishi(Hiroshima City Univ.) / Satoshi Fukumoto(NTT) / Hidetsugu Irie(Kyoto Sangyo Univ.) / Takashi Miyoshi(Tokyo Inst. of Tech.) / Yuichiro Shibata(Utsunomiya Univ.) / Kentaro Sano(Hokkaido Univ.) / Mayumi Takeyama(Hiroshima City Univ.) / Makoto Nagata(e-trees.Japan) / Kazuya Kodama(Nihon Univ.) / Hideaki Kimata(Toyohashi Univ. of Tech.) / (Univ. of Tokyo) / (Panasonic) / (Nagoya Univ.)
Assistant / Masayuki Arai(Nihon Univ.) / Yasuaki Ito(Hiroshima Univ.) / Tomoaki Tsumura(Nagoya Inst. of Tech.) / Yuuki Kobayashi(NEC) / Hiroki Nakahara(Tokyo Inst. of Tech.) / Yuichi Akage(NTT) / Masanori Natsui(Tohoku Univ.) / Masatoshi Tsuge(Socionext) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) / Yasutaka Matsuo(NHK) / Kazuya Hayase(NTT)

Paper Information
Registration To Technical Committee on VLSI Design Technologies / Technical Committee on Dependable Computing / Technical Committee on Computer Systems / Technical Committee on Reconfigurable Systems / Technical Committee on Component Parts and Materials / Technical Committee on Integrated Circuits and Devices / Technical Committee on Image Engineering / Special Interest Group on System and LSI Design Methodology / Special Interest Group on Embedded Systems / Special Interest Group on System Architecture
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Simulation Techniques for EMC Compliant Design of Automotive IC Chips and Modules
Sub Title (in English)
Keyword(1) Electromagnetic susceptibility
Keyword(2) Electromagnetic immunity
Keyword(3) Substrate coupling
Keyword(4) Power delivery network
Keyword(5) Direct power injection
Keyword(6) Extended chip power model
Keyword(7) Local interconnect network
Keyword(8)
1st Author's Name Akihiro Tsukioka
1st Author's Affiliation Kobe University(Kobe Univ.)
2nd Author's Name Makoto Nagata
2nd Author's Affiliation Kobe University(Kobe Univ.)
3rd Author's Name Kohki Taniguchi
3rd Author's Affiliation Kobe University(Kobe Univ.)
4th Author's Name Daisuke Fujimoto
4th Author's Affiliation Kobe University(Kobe Univ.)
5th Author's Name Rieko Akimoto
5th Author's Affiliation Toshiba Corporation(TOSHIBA)
6th Author's Name Takao Egami
6th Author's Affiliation Toshiba Corporation(TOSHIBA)
7th Author's Name Kenji Niinomi
7th Author's Affiliation Toshiba Corporation(TOSHIBA)
8th Author's Name Takeshi Yuhara
8th Author's Affiliation Toshiba Corporation(TOSHIBA)
9th Author's Name Sachio Hayashi
9th Author's Affiliation Toshiba Corporation(TOSHIBA)
10th Author's Name Rob Mathews
10th Author's Affiliation Semiconductor BU, ANSYS Inc.(ANSYS)
11th Author's Name Karthik Srinivasan
11th Author's Affiliation Semiconductor BU, ANSYS Inc.(ANSYS)
12th Author's Name Ying-Shiun Li
12th Author's Affiliation Semiconductor BU, ANSYS Inc.(ANSYS)
13th Author's Name Norman Chang
13th Author's Affiliation Semiconductor BU, ANSYS Inc.(ANSYS)
Date 2017-11-07
Paper # CPM2017-84,ICD2017-43,IE2017-69
Volume (vol) vol.117
Number (no) CPM-275,ICD-276,IE-277
Page pp.pp.27-32(CPM), pp.27-32(ICD), pp.27-32(IE),
#Pages 6
Date of Issue 2017-10-30 (CPM, ICD, IE)