Summary
International Symposium on Nonlinear Theory and its Applications
2017
Session Number:A1L-E
Session:
Number:A1L-E-3
FPGA-Based Implementation of Digital Spike Maps
Tomoki Hamaguchi, Toshimichi Saito,
pp.87-90
Publication Date:2017/12/4
Online ISSN:2188-5079
DOI:10.34385/proc.29.A1L-E-3
PDF download (221.3KB)
Summary:
This paper studies realization of desired digital spike-trains based on a simple evolutionary algorithm. First, the dynamics of spike-trains is visualized by a digital spike map. The map is defined on a set of points and is represented by a characteristic vector of integers. Second, in order to realize desired spike-trains, we present a simple evolutionary algorithm that aims at optimization of the characteristic vector for a cost function. Third, in order to implement the digital spike map, we introduce a digital spiking neuron consisting of two shift registers and a wiring between them.