Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:G2
Session:
Number:G2-1
An Interface based on Switched-Capacitor Sample/Hold circuit of Differential Capacitance Transducers
Satomi Ogawa, Takuya Tanigawa, Daisuke Adachi,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
DOI:10.34385/proc.39.G2-1
PDF download (87.6KB)
Summary:
For high-accuracy and high-speed signal processing of differential capacitance transducers, an interface circuitry based on a switched-capacitor sample/hold circuit using unity-gain buffer (UGB) is developed. The interface produces the output voltage which is proportional to the ratio of difference-to-sum of two capacitors of a differential transducer using only single reference voltage, Vr. Hspice simulations are described to predict performances of the interface when implemented by 0.35μm n-well CMOS process. Experimental results using discrete components are also given to confirm the principles of operation.