Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2016
Session Number:M2-2
Session:
Number:M2-2-6
Automatic Test Pattern Generation for Multiple Stuck-At Faults: When Testing for Single Faults is Insufficient
Conrad JinYong Moore, Amir Masoud Gharehbaghi, Masahiro Fujita ,
pp.159-162
Publication Date:2016/7/10
Online ISSN:2188-5079
DOI:10.34385/proc.61.M2-2-6
PDF download (1003.2KB)
Summary:
As the number of gates per chip increase, the likelihood of fabricating a chip with multiple defects increases, yet there are no efficient ATPG techniques which can consistently detect such faults. The experiments and analysis in this paper show that, given an initial complete set of test patterns for single stuck-at faults, relatively few additional tests are necessary for full fault coverage. A potential method for covering all double stuck-at faults is briefly mentioned at the end of the paper.