Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:P2
Session:
Number:P2-77
An Efficient Design Methodology of Serial Concatenate Coding Scheme for CATV Transmission System
Minhyuk Kim, Jongtae Bae, Suksoon Choi, Taedoo Park, Namsoo Kim, Jiwon Jung,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
Summary:
This paper describes the design methodology of serial concatenate of cable systems. In implementing the cable modem, there are some problems to fabricate and fitting on FPGA chip. First, many clocks are needed in implementing cable modem. To reduce the number of clocks, we use the two memories. Second, the decoder must detect the unique sync-word. In this paper, we use 5-stage registers. The cable modem is fabricated on FPGA chip name as Vertex II pro xc2vp30-5 by Xilinx.