Summary

International Technical Conference on Circuits/Systems, Computers and Communications

2008

Session Number:P2

Session:

Number:P2-65

A Vector Graphic Accelerator for Embedded Systems

Yong Choi,  Eun-Kyung Hong,  Kwon-Hyung Lee,  Yong-Luo Shen,  Taek-Gyu Kim,  Hyun-Gyu Kim,  Hyeong-Cheol Oh,  

pp.-

Publication Date:2008/7/7

Online ISSN:2188-5079

DOI:10.34385/proc.39.P2-65

PDF download (316.4KB)

Summary:
This paper presents a prototype hardware accelerator for two-dimensional vector graphics applications based on the OpenVG standard. Since our design mainly targets embedded applications, we focus on efficient uses of limited resources, especially the memory bandwidth. The designed accelerator can process the images of 640x240 pixels with moderate complexity at the rate of 30 frames per second. Our current design costs approximately .40 million equivalent gates when it is implemented using a 0.18um CMOS standard cell library.