Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:P2
Session:
Number:P2-33
VHDL Implementation of Sigma-delta Beamformers for Ultrasound Application
Yirui Deng, Jia Hao Cheong, Yvonne, Ying Hung Lam, Lian Soon Ng,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
Summary:
This paper presents the VHDL implementat1ion and the evaluation, in terms of hardware and power consumption, for 3 different sigma-delta beamforming (SDBF) algorithms. Synthesis was done at 160MHz operating frequency using Synopsys Design Vision with 0.18μm process. By taking the pre-delay reconstruction SBDF algorithm as reference, the post-delay reconstruction SDBF consumes only 10.71% of total dynamic power and 6.49% of total area. On the other hand, the post-delay reconstruction algorithm with insert-0 artifact correction technique consumes 11.68% of total dynamic power and 6.90% of total area.