Information and Systems-Reconfigurable Systems(Date:2005/11/23)

Presentation
表紙

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[Date]2005/11/23
[Paper #]
目次

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[Date]2005/11/23
[Paper #]
Variable Grain Logic Cell Architecture for Reconfigurable Device

Motoki AMAGASAKI,  Hideaki NAKAYAMA,  Naoto HAMABE,  Masahiro IIDA,  Toshinori SUEYOSHI,  

[Date]2005/11/23
[Paper #]RECONF2005-53
Implementation of Basic Function Blocks for Variable Grain Logic Cell

Naoto HAMABE,  Hideaki NAKAYAMA,  Motoki AMAGASAKI,  Masahiro IIDA,  Toshinori SUEYOSHI,  

[Date]2005/11/23
[Paper #]RECONF2005-54
A study of reconfigurable hardware architecture for physical layer of wireless access system

Yoshio WADA,  

[Date]2005/11/23
[Paper #]RECONF2005-55
Implementation of 1-D/2-D FFT on the Dynamically Reconfigurable Processor DAPDNA-2

Kosuke SHIBA,  Atsushi IMAIZUMI,  Takeshi SAKUMA,  

[Date]2005/11/23
[Paper #]RECONF2005-56
Adaptive Computling on the Dynamically Reconfigurable Processor DRP-1

Shohei ABE,  Yohei HASEGAWA,  Takao TOI,  Takeshi INUO,  Hideharu AMANO,  

[Date]2005/11/23
[Paper #]RECONF2005-57
A New Design Method for Implementing Real-Time Embedded Systems on Dynamically Reconfigurable Processors

Ryo NAKAHASHI,  Tomoya KITANI,  Keiichi YASUMOTO,  Akio NAKATA,  Teruo HIGASHINO,  

[Date]2005/11/23
[Paper #]RECONF2005-58
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[Date]2005/11/23
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[Date]2005/11/23
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[Date]2005/11/23
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