| Presentation | 2005-11-30 Adaptive Computling on the Dynamically Reconfigurable Processor DRP-1 Shohei ABE, Yohei HASEGAWA, Takao TOI, Takeshi INUO, Hideharu AMANO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Adaptive computing is one of the power reduction technics to take full advantage of reconfigurable devices. The approach, for example in mobile phones which require long-lasting batteries, makes the device choose a suitable circuit image from ones with different power consumption and error correction, as signal-to-noise ratio changes. In this paper, We have implemented five viterbi decoders of which constraint length K ranges from 3 to 7, and built a simulation environment of wireless communication to research the effectiveness of the adaptive computing on the DRP-1, the first silicon implementation of Dynamically Reconfigurable Processor(DRP). We have confirmed that its throughput varies from 4.71 Mbps to 9.95 Mbps and its power consumption does from 428.93 mW to 1028.97mW on the fixed throughput rate 4.71 Mbps. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Dynamically Reconfigurable System / DRP / Adaptive Computing / Viterbi Decoder / Virtual Hardware |
| Paper # | RECONF2005-57 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2005/11/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Adaptive Computling on the Dynamically Reconfigurable Processor DRP-1 |
| Sub Title (in English) | |
| Keyword(1) | Dynamically Reconfigurable System |
| Keyword(2) | DRP |
| Keyword(3) | Adaptive Computing |
| Keyword(4) | Viterbi Decoder |
| Keyword(5) | Virtual Hardware |
| 1st Author's Name | Shohei ABE |
| 1st Author's Affiliation | Department of Information and Computer Science, Keio University() |
| 2nd Author's Name | Yohei HASEGAWA |
| 2nd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 3rd Author's Name | Takao TOI |
| 3rd Author's Affiliation | NEC System Devices Research Labs. |
| 4th Author's Name | Takeshi INUO |
| 4th Author's Affiliation | NEC System Devices Research Labs. |
| 5th Author's Name | Hideharu AMANO |
| 5th Author's Affiliation | Department of Information and Computer Science, Keio University |
| Date | 2005-11-30 |
| Paper # | RECONF2005-57 |
| Volume (vol) | vol.105 |
| Number (no) | 450 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |