Information and Systems-Computer Systems(Date:2014/07/21)

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[Date]2014/7/21
[Paper #]
目次

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[Date]2014/7/21
[Paper #]
An FPGA-based Graph Processing Accelerator with PyCoRAM

Shinya TAKAMAEDA-YAMAZAKI,  Tadahiro EDAMOTO,  Jun YAO,  Yasuhiko NAKASHIMA,  

[Date]2014/7/21
[Paper #]CPSY2014-10
High Performance Graph Processing with a Memory Intensive Array Accelerator

Ryo SHIMIZU,  Shinya TAKAMAEDA-YAMAZAKI,  Jun YAO,  Yasuhiko NAKASHIMA,  

[Date]2014/7/21
[Paper #]CPSY2014-11
An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA

Xin ZHOU,  Yasuaki ITO,  Koji NAKANO,  

[Date]2014/7/21
[Paper #]CPSY2014-12
Performance Evaluation of Hadoop Applications in Hybrid Cloud

Hayata OHNAGA,  Kento AIDA,  Omar ABDUL-RAHMAN,  

[Date]2014/7/21
[Paper #]CPSY2014-13
Fast Evaluation Method based on Static Code Analysis for Programs Derived by the Iterative Optimization on the Polyhedral Model

Tomoyuki HOSAKA,  Nobuhiko SUGINO,  

[Date]2014/7/21
[Paper #]CPSY2014-14
Auto Program Tuning for Improving Utilization of GPU Resources

Ryo TAKESHIMA,  Tomoaki TSUMURA,  

[Date]2014/7/21
[Paper #]CPSY2014-15
Performance Evaluation of Speculative Parallel Processing Utilizing Hardware Transactional Memory on Commercial Multi-core CPU

Yutaka MATSUNO,  Kanemitsu OOTSU,  Takeshi OHKAWA,  Takashi YOKOTA,  

[Date]2014/7/21
[Paper #]CPSY2014-16
Verification Method of the Split Circuit by High-Level Synthesis Tool in a Circuit Partitioning mechanism

Kazuya MATSUDA,  Takefumi MIYOSHI,  Masashi TAKEMOTO,  Satoshi FUNADA,  Hironori NAKAJO,  

[Date]2014/7/21
[Paper #]CPSY2014-17
Design and Performance Evaluation of a Manycore Processor for Large FPGA

Haruka MORI,  Kenji KISE,  

[Date]2014/7/21
[Paper #]CPSY2014-18
A Study of Accelerated Image Processing of Stabilizing Navigational Image by HW/SW Cooperative Processing on an FPGA

Daichi UETAKE,  Takeshi OHKAWA,  Yohei MATSUMOTO,  Takashi YOKOTA,  Kanemitsu OOTSU,  

[Date]2014/7/21
[Paper #]CPSY2014-19
Interconnect Design for Low Latency, High Topological Embeddability and Partitioning Capability by Supplementary Optical Circuit Switches

Ryuta KAWANO,  Ikki FUJIWARA,  Hiroki MATSUTANI,  Hideharu AMANO,  Michihiro KOIBUCHI,  

[Date]2014/7/21
[Paper #]CPSY2014-20
TCP Protocol for 40Gbps Data Transfer

Fukumasa MORIFUJI,  Kei HIRAKI,  

[Date]2014/7/21
[Paper #]CPSY2014-21
Alterable uniform and random NoC through rewiring

Seiichi TADE,  Ryuta KAWANO,  Hiroki MATSUTANI,  Michihiro KOIBUCHI,  Hideharu AMANO,  

[Date]2014/7/21
[Paper #]CPSY2014-22
Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations

Akihiko KASAGI,  Koji NAKANO,  Yasuaki ITO,  

[Date]2014/7/21
[Paper #]CPSY2014-23
Cache Scheme Optimized to Access Behavior of Flash SSDs

Shugo OGAWA,  

[Date]2014/7/21
[Paper #]CPSY2014-24
Middlewares Utilizing The Characteristics of Resource Disaggregated Architecture

Masaki KAN,  Jun SUZUKI,  Yuki HAYASHI,  Takashi YOSHIKAWA,  Shinya MIYAKAWA,  

[Date]2014/7/21
[Paper #]CPSY2014-25
A preminarily evaluation on primitive data transfer performance of PEACH3

Hideharu AMANO,  Takuya KUHARA,  Toshihiro HANAWA,  Yuetsu KODAMA,  Taisuke BOKU,  

[Date]2014/7/21
[Paper #]CPSY2014-26
Consideration of 2D-FFT by Decomposition of Large Scale Data on Multi-CPU

Hiroaki MIYATA,  BoazJessie JACKIN,  Takeshi OHKAWA,  Kanemitsu OOTSU,  Takashi YOKOTA,  Yoshio HAYASAKI,  Toyohiko YATAGAI,  Takanobu BABA,  

[Date]2014/7/21
[Paper #]CPSY2014-27
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