IEICE Technical Committee

Electronics-Integrated Circuits and Devices(Date:2007/01/11)

Presentation

表紙

[Date]2007/1/11
[Paper #]

On-Die Monitoring of Substrate Coupling for Mixed-Signal Circuit Isolation

Takumi DANJO, Daisuke KOSAKA, Makoto NAGATA,

[Date]2007/1/11
[Paper #]CPM2006-129,ICD2006-171

Study on Active Substrate Noise Cancelling Technique using Power Line di/dt Detector

Taisuke KAZAMA, Makoto IKEDA, Kunihiro ASADA,

[Date]2007/1/11
[Paper #]CPM2006-130,ICD2006-172

Measurement of Delay Variation Due to Inductive Coupling Noise in 90nm Global Interconnects

Yasuhiro OGASAHARA, Masanori HASHIMOTO, Takao ONOYE,

[Date]2007/1/11
[Paper #]CPM2006-131,ICD2006-173

Measurement of Delay Degradation Due to Power Supply Noise and Delay Variation Estimation with Full-chip Simulation

Yasuhiro OGASAHARA, Takashi ENAMI, Masanori HASHIMOTO, Takashi SATO, Takao ONOYE,

[Date]2007/1/11
[Paper #]CPM2006-132,ICD2006-174

Delay Variation Analysis in Consideration of Dynamic Power Supply Noise Waveform

Mitsuya FUKAZAWA, Makoto NAGATA,

[Date]2007/1/11
[Paper #]CPM2006-133,ICD2006-175

Proximity Inter-Chip Communication

Tadahiro KURODA, Kiichi NIITSU,

[Date]2007/1/11
[Paper #]CPM2006-134,ICD2006-176

Fine Pitch Electronic Circuit Pattern Formation : The Synthetic Approach of Metal Nanoparticles

Masami NAKAMOTO,

[Date]2007/1/11
[Paper #]CPM2006-135,ICD2006-177

In Situ

Mizuki MOTOYOSHI, Minoru FUJISHIMA,

[Date]2007/1/11
[Paper #]CPM2006-136,ICD2006-178

Design of Wideband Tuning VCO for TV Receiver System

Takatsugu KAMATA, Toshimasa MATSUOKA, Kenji TANIGUCHI,

[Date]2007/1/11
[Paper #]CPM2006-137,ICD2006-179

An Integrated 20-26GHz CMOS Up-Conversion Mixer with Low Power Consumption

Yuki KAMBAYASHI, Ivan C. H. LAI, Minoru FUJISHIMA,

[Date]2007/1/11
[Paper #]CPM2006-138,ICD2006-180

Three-Dimensional Packaging Technology and Super-Chip Integration

Tetsu TANAKA, Takafumi FUKUSHIMA, Mitsumasa KOYANAGI,

[Date]2007/1/11
[Paper #]CPM2006-139,ICD2006-181

Local Deformation and Residual Stress of Thinned Stacked Silicon Chip Mounted Using Flip Chip Technology

Hideo MIURA, Nobuki UETA, Yuki SATO,

[Date]2007/1/11
[Paper #]CPM2006-140,ICD2006-182

Development of Packages for Ultra-violet Light-Emitting Diodes : Approach to high-light-extraction efficiency by Flip-Chip packages

Iwao MITSUISHI, Shinya NUNOUE, Hiroshi YAMADA, Yasushi HATTORI,

[Date]2007/1/11
[Paper #]CPM2006-141,ICD2006-183

Ultra-Fine Pitch Cu Bumpless Interconnect for High Density SiP Technology

Akitsu SHIGETOU, Toshihiro ITOH, Tadatomo SUGA,

[Date]2007/1/11
[Paper #]CPM2006-142,ICD2006-184

Modeling of Wire Bonding Process for High Performance Device

Eiichi YAMADA, Masazumi AMAGAI,

[Date]2007/1/11
[Paper #]CPM2006-143,ICD2006-185

Signal Transmission Guideline in IC Package

Kentaro TAKAO, Chikara AZUMA, Masazumi AMAGAI,

[Date]2007/1/11
[Paper #]CPM2006-144,ICD2006-186

Failure analysis system to classify failure modes using combination of FBMs

Hitoshi Maeda, Fumihito Ohta, Michio Kuniya, Koji Fukumoto,

[Date]2007/1/11
[Paper #]CPM2006-145,ICD2006-187

Improvement of Layout Analysis by Connecting Emission or OBIRCH signals to CAD Information

Akira SHIMASE, Akihito UCHIKADO, Mitsuaki SAEKI, Shinichi WATARAI, Takeshi SUZUKI, Toshiyuki MAJIMA, Kazuhiro HOTTA, Hirotoshi TERADA,

[Date]2007/1/11
[Paper #]CPM2006-146,ICD2006-188