Presentation 2007-01-19
Failure analysis system to classify failure modes using combination of FBMs
Hitoshi Maeda, Fumihito Ohta, Michio Kuniya, Koji Fukumoto,
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Abstract(in English) We have developed the system to classify failure modes using combination of fail bit patterns appeared in same areas of fail bit maps (FBMs) obtained under different test conditions for a same sample. As a result, we can classify detailed failure modes with ease.
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Keyword(in English) fail bit map / test / failure analysis / failure mode
Paper # CPM2006-145,ICD2006-187
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Conference Date 2007/1/11(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Failure analysis system to classify failure modes using combination of FBMs
Sub Title (in English)
Keyword(1) fail bit map
Keyword(2) test
Keyword(3) failure analysis
Keyword(4) failure mode
1st Author's Name Hitoshi Maeda
1st Author's Affiliation Process Technology Development Division, Production and Technology Unit, Renesas Technology Corp.()
2nd Author's Name Fumihito Ohta
2nd Author's Affiliation Process Technology Development Division, Production and Technology Unit, Renesas Technology Corp.
3rd Author's Name Michio Kuniya
3rd Author's Affiliation Process Technology Development Division, Production and Technology Unit, Renesas Technology Corp.
4th Author's Name Koji Fukumoto
4th Author's Affiliation Process Technology Development Division, Production and Technology Unit, Renesas Technology Corp.
Date 2007-01-19
Paper # CPM2006-145,ICD2006-187
Volume (vol) vol.106
Number (no) 468
Page pp.pp.-
#Pages 6
Date of Issue