Electronics-Silicon Devices and Materials(Date:1998/07/24)

Presentation
A Sophisticated Bit-by-Bit Verifying Scheme for NAND EEPROM's

Kazushige Kanda,  Hiroshi Nakamura,  Ken-ichi Imamiya,  Koji Sakui,  Jun-ichi Miyamoto,  

[Date]1998/7/24
[Paper #]SDM98-110,ICD98-109
A DRAM Module Generator with an Expandable Cell Array Scheme

Hideki Takeuchi,  Tomoaki Yabe,  Shinji Miyano,  Takehiko Hojo,  Motohiro Enkaku,  Masaaki Yamada,  Masami Murakata,  

[Date]1998/7/24
[Paper #]SDM98-111,ICD98-110
An Embedded DRAM Technology

Makoto Yoshida,  Takahiro Kumauchi,  Keizo Kawakita,  Naofumi Ohashi,  Hiroyuki Enomoto,  Tadashi Umezawa,  Naoki Yamamoto,  Isamu Asano,  Yoshitaka Tadaki,  

[Date]1998/7/24
[Paper #]SDM98-112,ICD98-111
New Three Dimensional (3D) Memory Array Architecture For Future Ultra High Density DRAM

Tetsuo Endoh,  Katsuhisa Shinmei,  Hiroshi Sakuraba,  Fujio Masuoka,  

[Date]1998/7/24
[Paper #]SDM98-113,ICD98-112
[OTHERS]

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[Date]1998/7/24
[Paper #]
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