| Presentation | 1998/7/24 An Embedded DRAM Technology Makoto Yoshida, Takahiro Kumauchi, Keizo Kawakita, Naofumi Ohashi, Hiroyuki Enomoto, Tadashi Umezawa, Naoki Yamamoto, Isamu Asano, Yoshitaka Tadaki, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An embedded DRAM technology, which is considered as the first step to a system-on-chip, is important to give a roadmap for future process technology. DRAM based process has been chosen to meet the future demand for large memory capacity of a system-on-chip. Advanced materials for inter layer dielectric and memory capacitor can reduce the thermal budget of process integration and improve device characteristics fo high-speed logic circuits. Shrinkage of memory cell size causes increase of parasitic resistance of word lines and bit lines and results in serious delay of memory access time.The metal-based cell structure with poly/metal gate and metal bit lines which conforms to low temperature process integration are introduced to improve memory characteristics. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | embedded DRAM / ploy/metal gate / metal bit line / SOG / CMP / TaO |
| Paper # | SDM98-112,ICD98-111 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 1998/7/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Embedded DRAM Technology |
| Sub Title (in English) | |
| Keyword(1) | embedded DRAM |
| Keyword(2) | ploy/metal gate |
| Keyword(3) | metal bit line |
| Keyword(4) | SOG |
| Keyword(5) | CMP |
| Keyword(6) | TaO |
| 1st Author's Name | Makoto Yoshida |
| 1st Author's Affiliation | Device Development Center, Hitachi Ltd.() |
| 2nd Author's Name | Takahiro Kumauchi |
| 2nd Author's Affiliation | Device Development Center, Hitachi Ltd. |
| 3rd Author's Name | Keizo Kawakita |
| 3rd Author's Affiliation | Device Development Center, Hitachi Ltd. |
| 4th Author's Name | Naofumi Ohashi |
| 4th Author's Affiliation | Device Development Center, Hitachi Ltd. |
| 5th Author's Name | Hiroyuki Enomoto |
| 5th Author's Affiliation | Device Development Center, Hitachi Ltd. |
| 6th Author's Name | Tadashi Umezawa |
| 6th Author's Affiliation | Device Development Center, Hitachi Ltd. |
| 7th Author's Name | Naoki Yamamoto |
| 7th Author's Affiliation | Central Research Laboratory, Hitachi Ltd. |
| 8th Author's Name | Isamu Asano |
| 8th Author's Affiliation | Device Development Center, Hitachi Ltd. |
| 9th Author's Name | Yoshitaka Tadaki |
| 9th Author's Affiliation | Device Development Center, Hitachi Ltd. |
| Date | 1998/7/24 |
| Paper # | SDM98-112,ICD98-111 |
| Volume (vol) | vol.98 |
| Number (no) | 194 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |