Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:D4
Session:
Number:D4-2
High Performance Level-Converting Flip-Flop with a Simple Pulse Generator and a Fast Latch
Hyoun Soo Park, Hong Bo Che, Wook Kim, Young Hwan Kim,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
Summary:
This paper proposes a high-performance level-converting flip-flop (LCFF) for multi-VDD systems, called the explicit pulse-triggered dual-pass-transistor flip-flop (EPDFF). The proposed EPDFF provides both low power and high speed operations through the use of a simple pulse generator and a simple latch with a short signal propagation path. In experiments, EPDFF outperformed six existing LCFFs in both power consumption and delay in its operating range. After optimization for the minimum power-delay product (PDP), EPDFF had 19.4~52.6% less PDP than existing LCFFs, and had the smallest transistor area among the seven LCFFs we compared.