Summary

International Technical Conference on Circuits/Systems, Computers and Communications

2008

Session Number:C3

Session:

Number:C3-2

Shortening of Processing Time of Optimal Design of Multiple Constant Multiplication using FPGAs.

Masao Nakayama,  Takao Sasaki,  Hisamichi Toyoshima,  

pp.-

Publication Date:2008/7/7

Online ISSN:2188-5079

DOI:10.34385/proc.39.C3-2

PDF download (249KB)

Summary:
Problem of designing multiple constant multiplication (MCM) circuits with minimum cost is known to be an NP complete problem. As for MCM problem, some techniques of using combinatorial optimization algorithms such as genetic algorithm (GA) etc., have been proposed. However, if implemented in software, it takes a great amount of time for optimization as the design scale increases. The purpose of this research is to shorten the time spent on the optimization of the MCM circuit design. A hardware oriented algorithm suitable for FPGAs on both circuit synthesis and optimization is proposed.