Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:C2
Session:
Number:C2-2
Development of Heterogenous Multi-core Processor "Hy-DiSC" with Dynamic Reconfigurable Processor
Takuro Uchida, Yasuhiro Nishinaga, Tetsuya Zuyama, Kazuya Tanigawa, Tetsuo Hironaka,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
Summary:
For accelerating multimedia applications by streaming, we have proposed the heterogeneous multicore processor Hy-DiSC with dynamic reconfigurable processor DS-HIE. The goal of the Hy-DiSC processor is to achieve high performance in a small chip area. In this paper, the DS-HIE processor accelerates the 2-D DCT included in the JPEG encoding process. As a result, compared with the MeP processor the DS-HIE processor achieved 28 times higher performance. And, the DS-HIE processor requires fewer transistor counts to implement it.