Summary
International Symposium on Nonlinear Theory and its Applications
2010
Session Number:A3L-B
Session:
Number:A3L-B2
Architecture of The Next Generation Real Time CNN Processor: RTCNNP-v2
Evren Cesur, Nerhun Yildiz, Vedat Tavsanogluy,
pp.153-156
Publication Date:2010/9/5
Online ISSN:2188-5079
Summary:
This paper is the continuation of our previous work reported in [1], where the local control structure of the Second?Generation Real?Time Cellular Neural Network Processor (RTCNNP-v2) was covered. The system is primarily designed for high resolution, high speed real? time video image processing. In this paper the block diagram of the new processor and an improvement over the local control structure are presented. The proposed structures are coded in VHDL and realized on an FPGA.