Summary
International Symposium on Nonlinear Theory and Its Applications
2022
Session Number:A4L-D
Session:
Number:A4L-D-02
Design of a Low-Power FPGA-Based CNN Accelerator Based on Nonvolatile Logic-in-Memory Circuitry
Daisuke Suzuki , Masanori Natsui , Akira Tamakoshi , Yasuhiro Takako , Takahiro Hanyu,
pp.132-135
Publication Date:12/12/2022
Online ISSN:2188-5079
Summary:
A nonvolatile (NV) field-programmable gate array (FPGA) is quite attractive hardware platform for a binary convolutional neural network (BCNN) accelerator in terms of reconfigurability and ultra-low-power standby power consumption. Moreover, the use of NV logic-in-memory (LIM) circuitry makes it possible to improve both area efficiency and energy efficiency. In this paper, some related topics about NV-FPGA, NV-LIM circuitry, and its application to the BCNN accelerator are presented and its effectiveness is demonstrated.