Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:P2
Session:
Number:P2-30
Enhanced Heuristic Algorithms K-LAG-V and K-LAG-S for the Constrained Via Minimization Problem
Yuji Suga, Daisuke Takafuji, Toshimasa Watanabe,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
DOI:10.34385/proc.39.P2-30
PDF download (101.9KB)
Summary:
CVM requires finding any layer assignment of wire-segments, whose topology has already been given, so that the total number of vias may be minimized. A given topology of wire-segments is called an initial wiring layout. Let kCVM denote CVM in which k layers are available for routing. In this paper, only rectilinear routing is considered. The subject of the paper is to propose heuristic algorithms K-LAG-V and K-LAG-S that are enhanced versions of K-LAG. Based on experimental results, it is shown that they are promising ones for solving kCVM, k=4, 12.