Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:P2
Session:
Number:P2-25
Spike-compensated Low-Voltage Unity-Gain-Reset Switched-Capacitor Cyclic Digital-to-Analog Converter
Kenji Ohno, Hiroki Matsumoto, Kenji Murao,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
DOI:10.34385/proc.39.P2-25
PDF download (174.2KB)
Summary:
In this paper, it shows a Low-Voltage SC cyclic DAC. It is proposed which consists of a switch, capacitor, MOSFET and op-amp. To operate under low supply voltage, terminal of NMOS analog switch should connect to ground or virtual ground. However, major performance of conventional algolithmic DAC is limited by offset voltage and spike. C2 and C5 are used so that it may make compensate for the spike. Circuit operation is evaluated on SIMetrix.