Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:D1
Session:
Number:D1-3
Design of Application Specific Processor and Compiler for H.264 CAVLC Decoding
Jae-Jin Lee, Jun-Young Lee, MooKyoung Jeong, SeongMo Park, NakWoong Eum,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
Summary:
ASIPs are powerful solution which combines high performance of ASICs and flexibility of general purpose processors. This paper proposes a new application specific processor and compiler for CAVLC decoding and portable multimedia application. They are based on the 6-stage pipelined dual issue VLIW(Very Long Instruction Word) architecture, efficient CAVLC decoding instructions and compiler mapping techniques such as CKF(Compiler Known Function), Inline-Assembly and CGD(Code Generator Description). The proposed application specific processor whose gate-count is about 73K runs at 100MHz. Compared to the ARM966ES processor, the proposed method results in about 80% speed-up in terms of execution time and about 50% reduction in terms of hardware complexity without quality degeneration.