Summary

International Symposium on Antennas and Propagation

2012

Session Number:1B4

Session:

Number:1B4-2

60 GHz On-chip Patch Antenna Integrated in a 0.18-um CMOS Technology

Takuichi Hirano,  Kenichi Okada,  Jiro Hirokawa,  Makoto Ando,  

pp.-

Publication Date:2012/10/29

Online ISSN:2188-5079

DOI:10.34385/proc.15.1B4-2

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Summary:
A 60 GHz on-chip patch antenna integrated in a 0.18-um CMOS technology is evaluated by simulation and measurement. The agreement between measurement and simulation was very good in the frequency characteristic of reflection coefficient. The calculated peak gain and radiation efficiency were -14.5 dBi and 1.0 %, respectively. It is found that the conductor loss is dominant in degradation of radiation efficiency in the on-chip patch antenna when the height is very thin (~2/1000 wavelength). The radiation efficiency becomes large enough when height is larger than 100um (~2/100 wavelength). Experimental evaluation of radiation pattern and radiation efficiency is a future task. Improvement of radiation efficiency is also remaining as a future study.