Summary

International Technical Conference on Circuits/Systems, Computers and Communications

2008

Session Number:H2

Session:

Number:H2-5

A Power-Efficient Voltage Up-Converting Circuit System

Won-Ji lee,  Kyoung-Su Lee,  Jong-Min Baek,  Jung-Hyun Song,  Jae-Chul Park,  Kee-Won Kwon,  

pp.-

Publication Date:2008/7/7

Online ISSN:2188-5079

DOI:10.34385/proc.39.H2-5

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Summary:
We developed a low-power voltage upconverter system that is composed of charge pump, level detector, and level shifter, which generates 1.0uA-10V from 2.5V VDD using 0.18um CMOS technology. The efficiency of the Dickson's charge pump was analysed with respect to the size of pumping capacitors and the number of pumping stages, and the optimum condition was chosen from the analysis results. The level detector senses VPP voltage in capacitive division way in order to eliminate the steady state VPP power dissipation through the resistive voltage divider. The power consumption in level shifters is reduced without sacrificing the switching speed by inserting a bootstrapped p-MOSFET between cross-coupled p- MOSFET and pull down n-MOSFET. Combing the three techniques the power consumption of voltage up-converting circuit system is saved by 28%.