Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:H2
Session:
Number:H2-1
Low-Power 12-bit 160-MS/s Pipeline A/D Converters
Mai Nozawa, Daisuke Kurose, Takeshi Ueno, Tetsuro Itakura,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
Summary:
Low-power 12-bit 160-MS/s pipeline A/D converters are designed for wireless receivers. Instead of using ultra-deep submicron devices of low supply voltage, we employ analog-option devices that operate at supply voltage of 2.5V in a 90-nm CMOS process. To achieve lower power dissipation, an I/Q amplifier sharing technique is employed. Furthermore, charge transfer level shifters are proposed in S/H circuits and MDACs for realizing class-AB operation. The area is 1.1mm2, the simulated power dissipation is 75mW/channel and the simulated ENOB is 11.15bit.