Summary
International Technical Conference on Circuits/Systems, Computers and Communications
2008
Session Number:E4
Session:
Number:E4-4
Network on Chips Structure for Mapping Two Hidden Layers BP-ANNs
Yiping Dong, Takahiro Watanabe,
pp.-
Publication Date:2008/7/7
Online ISSN:2188-5079
DOI:10.34385/proc.39.E4-4
PDF download (362.3KB)
Summary:
In this paper we propose a system with NoCs structure to mapping 5 neurons in one router for the two hidden layers BP-ANNs. Our system is evaluated for the latency and throughput using NIRGAM NoCs simulator, and is implemented on an FPGA device to estimate system performance and power consumption. Experimental results show that our proposed system has a great reduction in communication load, low latency and a high throughput. It is also reconfigurable and expandable to meet various NN application problems, and besides, not only BP-ANNs but also a random-connected ANNs or any type ANNs can be implemented in the system by adjusting a routing algorithm of NoC.