Summary

International Technical Conference on Circuits/Systems, Computers and Communications

2008

Session Number:E4

Session:

Number:E4-1

Multiple-Valued Logic Clock Converter Networks

Ali Massoud Haidar,  Nawar El Ahdab,  Hiroyuki Shirahama,  Ali Alaeldine,  

pp.-

Publication Date:2008/7/7

Online ISSN:2188-5079

DOI:10.34385/proc.39.E4-1

PDF download (104KB)

Summary:
novel multiple-valued logic clock converters using artificial neural network are proposed. Based on a set of novel neural clock base converters, an essential part of the creative solution to the multiple-valued logic dual-clock or multi-clock circuit synchronization problem is presented in this paper. The multiple-valued logic neuron clock converters are planned to be useful in the multiple-valued logic neural central processing unit. The novel neural networks of the multiple-valued logic clock converters show numerous functionality features combined with design simplicity. All the converters make advantage of the logic oriented neural network mathematical tools and parallelism concepts allowing fast and simple systematic analysis. The simulation outcomes presented, pave the way toward new, stable, high speed, revolutionary neural multiple-valued logic processors.