Electronics-Integrated Circuits and Devices(Date:2012/07/26)

Presentation
An Insole Pedometer With Piezoelectric Energy Harvester and 2V Organic Circuits

Koichi Ishida,  Tsung-Ching Huang,  Kentaro Honda,  Yasuhiro Shinozuka,  Hiroshi Fuketa,  Tomoyuki Yokota,  Ute Zschieschang,  Hagen Klauk,  Gregory Tortissier,  Tsuyoshi Sekitani,  Makoto Takamiya,  Hiroshi Toshiyoshi,  Takao Someya,  Takayasu Sakurai,  

[Date]2012/7/26
[Paper #]SDM2012-81,ICD2012-49
A Fast-Transient-Response Digital Low-Dropout Regulator Comprising Thin-Oxide MOS Transistors in 40-nm CMOS process

Masafumi ONOUCHI,  Kazuo OTSUGA,  Yasuto IGARASHI,  Toyohito IKEYA,  Sadayuki MORITA,  Koichiro ISHIBASHI,  Kazumasa YANAGISAWA,  

[Date]2012/7/26
[Paper #]SDM2012-82,ICD2012-50
0.45-V Input Higher Than 90% Efficiency Buck Converter with On-Chip Gate Boost

Xin Zhang,  Po-Hung Chen,  Yoshikatsu Ryu,  Koichi Ishida,  Yasuyuki Okuma,  Kazunori Watanabe,  Takayasu Sakurai,  Makoto Takamiya,  

[Date]2012/7/26
[Paper #]SDM2012-83,ICD2012-51
High Efficient, Fast Load Tacking, Low EMI Wireless Power Delivery Circuits for Non-contact Memory Card

Hiroki Ishikuro,  Ryota Shinoda,  Kazutoshi Tomita,  Yuya Hasegawa,  

[Date]2012/7/26
[Paper #]SDM2012-84,ICD2012-52
A 1V 357Mb/s-Throughput TransferJet^ SoC with Embedded Transceiver and Digital Baseband in 90nm CMOS

Masahisa TAMURA,  Fumitaka KONDO,  Katsumi WATANABE,  Yasunori AOKI,  Yusuke SHINOHE,  Koki UCHINO,  Yuhei HASHIMOTO,  Fumihiro NISHIYAMA,  Hiroaki MIYACHI,  Ikuho NAGASE,  Itaru UEZONO,  Rie HISAMURA,  Itaru MAEKAWA,  

[Date]2012/7/26
[Paper #]SDM2012-85,ICD2012-53
A Low Voltage High-Speed Inductive-Coupling Transceiver with Adaptive Pulse Width Controller Using Multi-Phase Oscillator

Yuki URANO,  Takeshi MATSUBARA,  Isamu HAYASHI,  Abul Hasan Johari,  Kaoru KOHIRA,  Teruo Jo,  Tadahiro KURODA,  Hiroki ISHIKURO,  

[Date]2012/7/26
[Paper #]SDM2012-86,ICD2012-54
An All 0.5V, 1Mbps, 315MHz OOK Transceiver with 381μW Carrier-Frequency-Free Intermittent Sampling Receiver and 52μW Class-F Transmitter in 40-nm CMOS

Shunta IGUCHI,  Akira SAITO,  Kentaro HONDA,  Yunfei ZHENG,  Kazunori WATANABE,  Takayasu SAKURAI,  Makoto TAKAMIYA,  

[Date]2012/7/26
[Paper #]SDM2012-87,ICD2012-55
A 40nm Ultra Low Voltage SAR ADC with Timing Optimized Asynchronous Clock Generator

Ryota SEKIMOTO,  Akira SHIKATA,  Kentaro YOSHIOKA,  Tadahiro KURODA,  Hiroki ISHIKURO,  

[Date]2012/7/26
[Paper #]SDM2012-88,ICD2012-56
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