IEICE Technical Report

Print edition: ISSN 0913-5685
Online edition: ISSN 2432-6380

vol. 105, no. 443

VLSI Design Technologies

Workshop Date : 2005-12-02 / Issue Date : 2005-11-25

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VLD2005-76
On Low Capture Power Test Generation for Scan Testing
Tatsuya Suzuki, Xiaoqing Wen, Seiji Kajihara (K.I.T.), Kohei Miyase, Yoshihiro Minamoto (JST)
pp. 1 - 6

VLD2005-77
A Broadside Test Generation Method for Transition Faults in Partial Scan Circuits
Tsuyoshi Iwagaki (JAIST), Satoshi Ohtake, Hideo Fujiwara (NAIST)
pp. 7 - 12

VLD2005-78
A Note on Expansion of Convolutional Compactors on Galois Field
Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metro. Univ.)
pp. 13 - 18

VLD2005-79
Handling of Variables and Functions for Software Compatible Hardware Synthesizer CCAP
Kenichi Nishiguchi, Nagisa Ishiura, Masanari Nishimura (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Hiroyuki Tomiyama (Nagoya Univ.), Yutetsu Takatsukasa, Manabu Kotani (Kyoto Univ.)
pp. 19 - 24

VLD2005-80
A Method for Allocating Bus Transfer and Task Execution Cycles Based on Scenarios
Seiji Yamaguchi, Tadaaki Tanimoto, Akio Nakata, Teruo Higashino (Osaka Univ.)
pp. 25 - 30

VLD2005-81
no title
Kenichi Jyoko, Takahiro Ohguchi, Hirokazu Uetsu, Koji Sakai, noname, Takashi Kambe (noname)
pp. 31 - 36

VLD2005-82
Examinations of Small-World and Scale-Free characteristics in logic circuits
Toshiaki Miyazaki (Univ. of Aizu)
pp. 37 - 40

VLD2005-83
Exact Minimum Factoring via Quantified Boolean Satisfiability
Hiroaki Yoshida, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo)
pp. 41 - 46

VLD2005-84
An Encoding Method for Rail Outputs in LUT Cascade Emulators
Shinya Nagayasu, Tsutomu Sasao, Munehiro Matsuura (KIT)
pp. 47 - 52

VLD2005-85
A Logic Simulation using an LUT Cascade Emulator
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (KIT)
pp. 53 - 58

VLD2005-86
Efficient contraction of timed signal transition graphs
Tomohiro Yoneda (NII), Chris Myers (Univ. of Utah)
pp. 59 - 64

VLD2005-87
Structural Coverage of Traversed Transitions for Symbolic Model Checking
Xingwen Xu, Shinji Kimura (Waseda Univ.), Kazunari Horikawa, Takehiko Tsuchiya (Toshiba)
pp. 65 - 70


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan