Presentation 2012-08-02
3D Interconnect Technology by the Ultrawide-Interchip-Bus System for 3D Stacked LSI Systems
Fumito IMURA, Shunsuke NEMOTO, Naoya WATANABE, Fumiki KATO, Katsuya KIKUCHI, Hiroshi NAKAGAWA, Michiya HAGIMOTO, Hiroyuki UCHIDA, Takashi OMORI, Yasumori HIBI, Yukoh MATSUMOTO, Masahiro AOYAGI,
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Abstract(in English) We have proposed the ultrawide-interchip-bus system for the interchip communication of the 3-dimentional stacked LSI systems. The ultrawide-interchip-bus is assembled in the center of the 3-D stacked LSI by interconnection of the TSVs and micro-bumps array. In this paper, the 3-D interconnect technology, which are achieved by the fabrication of low-capacitance TSVs and the low-stress bonding process of Au cone-bumps, on the basic concept of the ultrawide-interchips-bus system is reported.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) 3D stacked LSI / TSV / Au cone-bump / 3D interconnect / Ultrawide interchip bus
Paper # SDM2012-71,ICD2012-39
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Committee ICD
Conference Date 2012/7/26(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) 3D Interconnect Technology by the Ultrawide-Interchip-Bus System for 3D Stacked LSI Systems
Sub Title (in English)
Keyword(1) 3D stacked LSI
Keyword(2) TSV
Keyword(3) Au cone-bump
Keyword(4) 3D interconnect
Keyword(5) Ultrawide interchip bus
1st Author's Name Fumito IMURA
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)()
2nd Author's Name Shunsuke NEMOTO
2nd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
3rd Author's Name Naoya WATANABE
3rd Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
4th Author's Name Fumiki KATO
4th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
5th Author's Name Katsuya KIKUCHI
5th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
6th Author's Name Hiroshi NAKAGAWA
6th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
7th Author's Name Michiya HAGIMOTO
7th Author's Affiliation TOPS Systems Corporation
8th Author's Name Hiroyuki UCHIDA
8th Author's Affiliation TOPS Systems Corporation
9th Author's Name Takashi OMORI
9th Author's Affiliation TOPS Systems Corporation
10th Author's Name Yasumori HIBI
10th Author's Affiliation TOPS Systems Corporation
11th Author's Name Yukoh MATSUMOTO
11th Author's Affiliation TOPS Systems Corporation
12th Author's Name Masahiro AOYAGI
12th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
Date 2012-08-02
Paper # SDM2012-71,ICD2012-39
Volume (vol) vol.112
Number (no) 170
Page pp.pp.-
#Pages 6
Date of Issue