| Presentation | 2008-01-31 Half adder operation based on 2-output single-electron device using a Si nanodot array Takuya KAIZAWA, Minkyu Jo, Masashi ARITA, Akira FUJIWARA, Kenji YAMAZAKI, Yukinori Ono, Hiroshi INOKAWA, Yasuo TAKAHASHI, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Single-electron devices (SEDs) have been studied for future large-scale integrated circuits because of their very low power even in highly integrated circuits. We take advantage of special feature of SEDs, capability of multiple gates and multiple outputs, which enable the device to operate with high functionalities. We proposed a functional Si-nanodot-array device, which has two input gates, a control gate and two outputs. We actually fabricated such a device with Si MOS processes and tested its basic operation experimentally. We demonstrated that the device operates as a half adder with just one device. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | single electron / nanodot array / Coulomb blockade / half adder |
| Paper # | ED2007-250,SDM2007-261 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2008/1/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Half adder operation based on 2-output single-electron device using a Si nanodot array |
| Sub Title (in English) | |
| Keyword(1) | single electron |
| Keyword(2) | nanodot array |
| Keyword(3) | Coulomb blockade |
| Keyword(4) | half adder |
| 1st Author's Name | Takuya KAIZAWA |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido Univ.() |
| 2nd Author's Name | Minkyu Jo |
| 2nd Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido Univ. |
| 3rd Author's Name | Masashi ARITA |
| 3rd Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido Univ. |
| 4th Author's Name | Akira FUJIWARA |
| 4th Author's Affiliation | NTT Basic Research Laboratories, NTT Corporation |
| 5th Author's Name | Kenji YAMAZAKI |
| 5th Author's Affiliation | NTT Basic Research Laboratories, NTT Corporation |
| 6th Author's Name | Yukinori Ono |
| 6th Author's Affiliation | NTT Basic Research Laboratories, NTT Corporation |
| 7th Author's Name | Hiroshi INOKAWA |
| 7th Author's Affiliation | Research Institute of Electronics, Shizuoka University |
| 8th Author's Name | Yasuo TAKAHASHI |
| 8th Author's Affiliation | Graduate School of Information Science and Technology, Hokkaido Univ. |
| Date | 2008-01-31 |
| Paper # | ED2007-250,SDM2007-261 |
| Volume (vol) | vol.107 |
| Number (no) | 474 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |