| Presentation | 2015-08-25 [Invited Talk] Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi, Nobuyuki Sugii, Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf/SiON gate stack of mid-gap work function and precise GIDL control achieved ultra-low leakage of 0.2 pA/µm, which corresponds to approx. 100nA/chip (100k gate logic). Now the SOTB technology can provide three options from ultra-low voltage to ultra-low leakage that covers a wide variety of applications in the Internet of Things (IoT) era. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SOI / thin BOX / Low Standby Leakage / SRAM |
| Paper # | SDM2015-67,ICD2015-36 |
| Date of Issue | 2015-08-17 (SDM, ICD) |
| Conference Information | |
| Committee | SDM / ICD |
|---|---|
| Conference Date | 2015/8/24(2days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kumamoto City |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Low voltage/low power techniques, novel devices, circuits, and applications |
| Chair | Yuzou Oono(Univ. of Tsukuba) / Minoru Fujishima(Hiroshima Univ.) |
| Vice Chair | Tatsuya Kunikiyo(Renesas) / Hideto Hidaka(Renesas) |
| Secretary | Tatsuya Kunikiyo(Tohoku Univ.) / Hideto Hidaka(Hiroshima Univ.) |
| Assistant | Tadashi Yamaguchi(Renesas) / Makoto Takamiya(Univ. of Tokyo) / Hiroe Iwasaki(NTT) / Takashi Hashimoto(Panasonic) / Hiroyuki Ito(Tokyo Inst. of Tech.) / Pham Konkuha(Univ. of Electro-Comm.) |
| Paper Information | |
| Registration To | Technical Committee on Silicon Device and Materials / Technical Committee on Integrated Circuits and Devices |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Invited Talk] Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications |
| Sub Title (in English) | |
| Keyword(1) | SOI |
| Keyword(2) | thin BOX |
| Keyword(3) | Low Standby Leakage |
| Keyword(4) | SRAM |
| 1st Author's Name | Yoshiki Yamamoto |
| 1st Author's Affiliation | Renesas Electronics Corporation(Renesas Electronics Corp.) |
| 2nd Author's Name | Hideki Makiyama |
| 2nd Author's Affiliation | Renesas Electronics Corporation(Renesas Electronics Corp.) |
| 3rd Author's Name | Tomohiro Yamashita |
| 3rd Author's Affiliation | Renesas Electronics Corporation(Renesas Electronics Corp.) |
| 4th Author's Name | Hidekazu Oda |
| 4th Author's Affiliation | Renesas Electronics Corporation(Renesas Electronics Corp.) |
| 5th Author's Name | Shiro Kamohara |
| 5th Author's Affiliation | Renesas Electronics Corporation(Renesas Electronics Corp.) |
| 6th Author's Name | Yasuo Yamaguchi |
| 6th Author's Affiliation | Renesas Electronics Corporation(Renesas Electronics Corp.) |
| 7th Author's Name | Nobuyuki Sugii |
| 7th Author's Affiliation | Hitachi, Ltd.(Hitachi) |
| 8th Author's Name | Tomoko Mizutani |
| 8th Author's Affiliation | The University of Tokyo(UT) |
| 9th Author's Name | Masaharu Kobayashi |
| 9th Author's Affiliation | The University of Tokyo(UT) |
| 10th Author's Name | Toshiro Hiramoto |
| 10th Author's Affiliation | The University of Tokyo(UT) |
| Date | 2015-08-25 |
| Paper # | SDM2015-67,ICD2015-36 |
| Volume (vol) | vol.115 |
| Number (no) | SDM-190,ICD-191 |
| Page | pp.pp.53-57(SDM), pp.53-57(ICD), |
| #Pages | 5 |
| Date of Issue | 2015-08-17 (SDM, ICD) |