Engineering Sciences/NOLTA-VLSI Design Technologies(Date:1999/09/21)

Presentation
表紙

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[Date]1999/9/21
[Paper #]
目次

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[Date]1999/9/21
[Paper #]
Anglo-Japanese joint development of the Bach system for C-based, high-level synthesis

Andrew Kay,  

[Date]1999/9/21
[Paper #]VLD99-64
A High-Level Synthesis Method Considering Synchronous Communication between Threads

Koichi NISHIDA,  Kazuhisa OKADA,  Mitsuhisa OHNISHI,  Andrew KAY,  Paul BOCCA,  Akihisa YAMADA,  Takashi KAMBE,  

[Date]1999/9/21
[Paper #]VLD99-65
An Area/Time Optimizing Algorithm for Control-Based Hardware Synthesis

Masayuki IENAGA,  Nozomu TOGAWA,  Masao YANAGISAWA,  Tatsuo OHTSUKI,  

[Date]1999/9/21
[Paper #]VLD99-66
Three-layer L-shaped Channel Routing Algorithm with Nets Sharing

Tutomu Utagawa,  Atsushi Takahashi,  

[Date]1999/9/21
[Paper #]VLD99-67
Multi-Level Logic Simplification using Satisfiability Don't Cares

Qiang Zhu,  Yusuke Matsunaga,  Shinji Kimura,  Katsumasa Watanabe,  

[Date]1999/9/21
[Paper #]VLD99-68
A Cycle-Accurate Simulator Toolkit for Soft-Core Processors

Eko Fajar Nurprasetyo,  Hiroto Yasuura,  

[Date]1999/9/21
[Paper #]VLD99-69
[OTHERS]

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[Date]1999/9/21
[Paper #]