Engineering Sciences/NOLTA-VLSI Design Technologies(Date:1996/07/26)

Presentation
表紙

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[Date]1996/7/26
[Paper #]
目次

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[Date]1996/7/26
[Paper #]
33rd Design Automation Conference(DAC) Report

Yusuke Matsunaga,  

[Date]1996/7/26
[Paper #]VLD96-26
Efficient Software Performance Estimation Methods for Hardware/Software Codesign

Kei Suzuki,  Alberto Sangiovanni Vincentelli,  

[Date]1996/7/26
[Paper #]VLD96-27
A HW/SW Partitioning Algorithm to Synthesize the Highest Performance Pipelined ASIPs with Multiple Identical Functional Units

Nguyen Ngoc BINH,  Masaharu IMAI,  Akichika SHIOMI,  Yoshinori TAKEUCHI,  

[Date]1996/7/26
[Paper #]VLD96-28
A Genetic Placement Method Considering the Preservation of Nets

Hiroyuki Shindo,  Akinori Kanesugi,  Naoshi Nakaya,  Mititada Morisue,  

[Date]1996/7/26
[Paper #]VLD96-29
An Algorithm for Finding a Maximum-Weight Decreasing Sequence in a Permutation, Motivated by Rectangle Packing Problem

Toshihiko Takahashi,  

[Date]1996/7/26
[Paper #]VLD96-30
Switching Activity Simulation Using an FPGA as a Hardware Engine

Hiroyuki OCHI,  

[Date]1996/7/26
[Paper #]VLD96-31
An Evaluation on Cost Functions in State Assignment Targeting Multi-level Implementation

Taeko MATSUNAGA,  Yusuke MATSUNAGA,  

[Date]1996/7/26
[Paper #]VLD96-32
Timing Analysis of Logic Circuits with Multiple Clock Operations

Shinji kimura,  Makoto Hirao,  Kasuyoshi Takagi,  Katsumasa Watanabe,  

[Date]1996/7/26
[Paper #]VLD96-33
[OTHERS]

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[Date]1996/7/26
[Paper #]