| Presentation | 1996/7/26 A HW/SW Partitioning Algorithm to Synthesize the Highest Performance Pipelined ASIPs with Multiple Identical Functional Units Nguyen Ngoc BINH, Masaharu IMAI, Akichika SHIOMI, Yoshinori TAKEUCHI, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes a new HW/SW partitioning algorithm for automatic synthesis of a pipelined CPU architecture with multiple identical functional units (MIFUs) of each type in designing ASIPs (Application Specific Integrated Processors). The partitioning problem is formalized as a combinatorial optimization problem that partitions the operations into hardware and software so that the performance of the designed ASIP is maximized under given gate count and power consumption constraints, regarding the optimal selection of needed FUs of each type. A branch-and-bound algorithm with proposed lower bound function is used to solve the formalized problem. The experimental results show that the proposed algorithm is found to be effective and efficient. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Pipelined ASIP / MIFU (Multiple Identical Functional Units), Performance Maximization / Partitioning |
| Paper # | VLD96-28 |
| Date of Issue |
| Conference Information | |
| Committee | VLD |
|---|---|
| Conference Date | 1996/7/26(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
|---|---|
| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A HW/SW Partitioning Algorithm to Synthesize the Highest Performance Pipelined ASIPs with Multiple Identical Functional Units |
| Sub Title (in English) | |
| Keyword(1) | Pipelined ASIP |
| Keyword(2) | MIFU (Multiple Identical Functional Units), Performance Maximization |
| Keyword(3) | Partitioning |
| 1st Author's Name | Nguyen Ngoc BINH |
| 1st Author's Affiliation | Dept. of Info. & Computer Sciences Graduate School of Engineering Science Osaka University() |
| 2nd Author's Name | Masaharu IMAI |
| 2nd Author's Affiliation | Dept. of Info. & Computer Sciences Graduate School of Engineering Science Osaka University |
| 3rd Author's Name | Akichika SHIOMI |
| 3rd Author's Affiliation | Dept. of Computer Science Faculty of Information Shizuoka University |
| 4th Author's Name | Yoshinori TAKEUCHI |
| 4th Author's Affiliation | Dept. of Info. & Computer Sciences Graduate School of Engineering Science Osaka University |
| Date | 1996/7/26 |
| Paper # | VLD96-28 |
| Volume (vol) | vol.96 |
| Number (no) | 201 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |