Engineering Sciences/NOLTA-VLSI Design Technologies(Date:1994/03/11)

Presentation
表紙

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[Date]1994/3/11
[Paper #]
目次

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[Date]1994/3/11
[Paper #]
The State-Of-The-Art of Physical Design for VLSI

Isao Shirakawa,  

[Date]1994/3/11
[Paper #]VLD93-111,ICD93-206
A Compaction Method for Full Chip VLSI Layouts Partitioning Compaction

Joseph Dao,  Nobu Matsumoto,  Tsuneo Hamai,  Chusei Ogawa,  Shojiro Mori,  

[Date]1994/3/11
[Paper #]VLD93-112,ICD93-207
A Placement Algorithm with Path Delay Optimization for High Speed LSI

Hidenori Sato,  Ikuo Harada,  

[Date]1994/3/11
[Paper #]VLD93-113,ICD93-208
A hybrid hierarchical global router for multi-layer VLSI′s

Masayuki Hayashi,  Shuji Tsukiyama,  

[Date]1994/3/11
[Paper #]VLD93-114,ICD93-209
A Detailed Router Based on Column-by-Column Approach.

Masahiro Nagamatsu,  

[Date]1994/3/11
[Paper #]VLD93-115,ICD93-210
Research on Hardware Implementation of LSI Routing

Kenji Inoue,  Tomofumi Arakawa,  Akitaka Kusaka,  Kazuhiro Ueda,  

[Date]1994/3/11
[Paper #]VLD93-116,ICD93-211
Hierarchical Circuit Optimization for Analog LSIs using Device Model Refining

Tomohiko Ohtsuka,  Hiroaki Kunieda,  

[Date]1994/3/11
[Paper #]VLD93-117,ICD93-212
MOSFET parameter extraction method with small model dependency

Masaki Kondo,  Takashi Morie,  Hidetoshi Onodera,  Keikichi Tamaru,  

[Date]1994/3/11
[Paper #]VLD93-118,ICD93-213
A Multi Representation in Design Data Capture System

Yuichiro Matsuoka,  Kunihiko Yamagisi,  Masatosi Sekine,  Nobuyuki Goto,  

[Date]1994/3/11
[Paper #]VLD93-119,ICD93-214
A fast path extraction algorithm with branch slack method

Masako Murofushi,  Masami Murakata,  Takashi Mitsuhashi,  

[Date]1994/3/11
[Paper #]VLD93-120,ICD93-215
[OTHERS]

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[Date]1994/3/11
[Paper #]