Presentation 1994/3/11
Research on Hardware Implementation of LSI Routing
Kenji Inoue, Tomofumi Arakawa, Akitaka Kusaka, Kazuhiro Ueda,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Conventionally,routing problems have been solved sequentially by Softwares.As the circuit size increaces,a vast amount of CPU time is needed for routing.This report describes a hardware implementation of router machine,in which the line-search method is used.The hardware architecture is described by using the SFL language and its behavior has been simulated and synthesized by using the PARTHENON system.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Routing / Line-Search method / CAD / Parallel Processing
Paper # VLD93-116,ICD93-211
Date of Issue

Conference Information
Committee VLD
Conference Date 1994/3/11(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Research on Hardware Implementation of LSI Routing
Sub Title (in English)
Keyword(1) Routing
Keyword(2) Line-Search method
Keyword(3) CAD
Keyword(4) Parallel Processing
1st Author's Name Kenji Inoue
1st Author's Affiliation Faculty of Systems Engineering,Shibaura Institute of Technology()
2nd Author's Name Tomofumi Arakawa
2nd Author's Affiliation Faculty of Systems Engineering,Shibaura Institute of Technology
3rd Author's Name Akitaka Kusaka
3rd Author's Affiliation Faculty of Systems Engineering,Shibaura Institute of Technology
4th Author's Name Kazuhiro Ueda
4th Author's Affiliation Faculty of Systems Engineering,Shibaura Institute of Technology
Date 1994/3/11
Paper # VLD93-116,ICD93-211
Volume (vol) vol.93
Number (no) 505
Page pp.pp.-
#Pages 8
Date of Issue