Engineering Sciences/NOLTA-Circuits and Systems(Date:2005/01/14)

Presentation
表紙

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[Date]2005/1/14
[Paper #]
目次

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[Date]2005/1/14
[Paper #]
Statistical Schedule Length Analysis in Asynchronous Datapath Synthesis

Koji OHASHI,  Mineo KANEKO,  

[Date]2005/1/14
[Paper #]CAS2004-72
A Finite Solution Space for Recurrent Placements

Mineo KANEKO,  Tomoyuki OGAWA,  

[Date]2005/1/14
[Paper #]CAS2004-73
Simultaneous Schedule and Skew Assignment for Multiplexer control in Placed Datapaths

Takayuki OBATA,  Mineo KANEKO,  

[Date]2005/1/14
[Paper #]CAS2004-74
A Technique to Analyze Bus Architecture Driven By Data Stream

Takefumi MIYOSHI,  Nobuhiko SUGINO,  

[Date]2005/1/14
[Paper #]CAS2004-75
A VLIW compiler framework to combine multiple code optimization methods

Yuhei KANEKO,  Nobuhiko SUGINO,  Akinori NISHIHARA,  

[Date]2005/1/14
[Paper #]CAS2004-76
On the implementation of digital lock-in-amp

Nobuhiro Miyaoka,  Akiyoshi Yonekura,  Nobuhiko Sugino,  

[Date]2005/1/14
[Paper #]CAS2004-77
High-level synthesis from executable code

Hidenori OGATA,  Akio KITAGAWA,  

[Date]2005/1/14
[Paper #]CAS2004-78
Multiple Programming Method and Circuitry for a Phase Change Nonvolatile Random Access Memory

Masashi TAKATA,  Kazuya NAKAYAMA,  Takatomi IZUMI,  Akio KITAGAWA,  

[Date]2005/1/14
[Paper #]CAS2004-79
Nonvolatile SRAM based on Phase Change

Masashi TAKATA,  Kazuya NAKAYAMA,  Takatomi IZUMI,  KITAGAWA Akio /,  

[Date]2005/1/14
[Paper #]CAS2004-80
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[Date]2005/1/14
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[Date]2005/1/14
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[Date]2005/1/14
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