Electronics-Integrated Circuits and Devices(Date:2002/08/15)

Presentation
表紙

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[Date]2002/8/15
[Paper #]
目次

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[Date]2002/8/15
[Paper #]
Low-Power Enhancing method for a Media-processor : Based on the Behavioral Information collected by a functional simulator

Toshihisa KAMEMARU,  Hiroyuki IIDA,  Hidenori SATO,  

[Date]2002/8/15
[Paper #]ICD2002-46
A 380-MHz CMOS linear-in-dB Variable Gain Amplifier

Osamu WATANABE,  Shoji OTAKA,  Mitsuyuki ASHIDA,  Tetsuro ITAKURA,  

[Date]2002/8/15
[Paper #]ICD2002-47
μI/O Architecture for 0.13-μm Wide-Voltage-Range System-on-a-Package (SoP) Designs

Yusuke KANNO,  Hiroyuki MIZUNO,  Nobuhiro OODAIRA,  Yoshihiko YASU,  Kazumasa YANAGISAWA,  

[Date]2002/8/15
[Paper #]ICD2002-48
Threshold Voltage Control Range in Variable Threshold Voltage Fully-Depleted SOI MOSFETs

Toshiharu NAGUMO,  Takashi INUKAI,  Atsumasa OHSAWA,  Toshiro HIRAMOTO,  

[Date]2002/8/15
[Paper #]ICD2002-49
Experimental Investigations of 100V-Lateral Schottky Barrier Diodes using Al and Al-Si-Cu for Barrier Metal

Hitoshi Sumida,  Astuo Hirabayashi,  

[Date]2002/8/15
[Paper #]ICD2002-50
High Performance 90 nm node PD SOI CMOS Devices

Hiroomi NAKAJIMA,  Makoto FUJIWARA,  Shigeru KAWANAKA,  Hideaki NII,  Tomoaki SHINO,  Atushi AZUMA,  Kazumi INOH,  Yuusuke KOHYAMA,  Yasuhiro KATSUMATA,  Hidemi ISHIUCHI,  

[Date]2002/8/15
[Paper #]ICD2002-51
Low Power Technology and Gate Oxide Thinning

Hiroshi Iwai,  

[Date]2002/8/15
[Paper #]ICD2002-52
Low Standby Power CMOS with HfO_2 Gate Oxide for 90-nm Generation

S. PIDIN,  Y. MORISAKI,  K. IRINO,  T. NAKAMURA,  T. SUGII,  

[Date]2002/8/15
[Paper #]ICD2002-53
An Embedded DRAM Technology with SOI/Bulk Hybrid Substrate for High-End SoC Application

Takashi YAMADA,  Kazumi TAKAHASHI,  Hisato OYAMATSU,  Hajime NAGANO,  Tsutomu SATO,  Ichiro MIZUSHIMA,  Shinichi NITTA,  Takehiko HOJI,  Koichi KOKUBUN,  Kaori YASUMOTO,  Yoshinori MATSUBARA,  Takeshi YOSHIDA,  Seiji YAMADA,  Yoshitaka TSUNASHIMA,  Yoshihiko SAITO,  Souichi NADAHARA,  Yasuhiro KATSUMATA,  Makoto YOSHIMI,  Hidemi ISHIUCHI,  

[Date]2002/8/15
[Paper #]ICD2002-54
A Robust Array Architecture for a Capacitorless MISS Tunnel-Diode Memory

Takeshi SAKATA,  Satoru HANZAWA,  Tomonori SEKIGUCHI,  Hideyuki MATSUOKA,  

[Date]2002/8/15
[Paper #]ICD2002-55
Low-Power Techniques for CMOS LSIs

Tadayoshi Enomoto,  Hiroaki Shikano,  Yoshinori Oka,  

[Date]2002/8/15
[Paper #]ICD2002-56
A Low Power Video Compression Algorithm using Dynamic Voltage Control based on Feed Forward Analysis

Kentaro KAWAKAMI,  Hideo OHIRA,  Masayuki MIYAMA,  Masahiko YOSHIMOTO,  

[Date]2002/8/15
[Paper #]ICD2002-57
Low-Power 0.13-μm CMOS Absolute Difference Accumulators for MPEG-4 Motion Estimation

Tomomi Ei,  Tadayoshi Enomoto,  

[Date]2002/8/15
[Paper #]ICD2002-58
Implementation of MPEG-4 Encoder Using Application Processor for Cellular Phones

Yuki KONDOH,  Tetsuya YAMADA,  Takanobu TSUNODA,  Makoto ISHIKAWA,  Koji YAMADA,  Junichi NISHIMOTO,  Naohiko IRIE,  Osamu NISHII,  Kunio UCHIYAMA,  

[Date]2002/8/15
[Paper #]ICD2002-59
Very Low Power System LSI toward 0.1V Operation : Issues and solutions for low power circuit techniques

Masayuki MIYAZAKI,  Goichi ONO,  Takehiro SHIMIZU,  Yusuke KANNO,  Takayuki KAWAHARA,  

[Date]2002/8/15
[Paper #]ICD2002-60
A Low-power W-CDMA demodulator using uDSPs

Hiroyuki IGURA,  Masaru HIRATA,  Junya YAMADA,  Masakazu YAMASHINA,  Shigeru ONO,  

[Date]2002/8/15
[Paper #]ICD2002-61
A 400MHz 32bit Embedded Microprocessor Core AM34-1 with Cross-Bar Bus Switch for SoC

Takanori FURUZONO,  Masaitsu NAKAJIMA,  Takao YAMAMOTO,  Shinji OZAKI,  Tomohisa SEZAKI,  Tomochika KANAKOGI,  Takeshi SAKAMOTO,  Toshihisa ARUGA,  Masaya SUMITA,  

[Date]2002/8/15
[Paper #]ICD2002-62
8-way VLIW embedded microprocessor and logical verification method

Teruhiko KAMIGATA,  Hideo MIYAKE,  Yasuki NAKAMURA,  Hiroshi OKANO,  Atuhiro SUGA,  

[Date]2002/8/15
[Paper #]ICD2002-63
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