Presentation 2002/8/15
Very Low Power System LSI toward 0.1V Operation : Issues and solutions for low power circuit techniques
Masayuki MIYAZAKI, Goichi ONO, Takehiro SHIMIZU, Yusuke KANNO, Takayuki KAWAHARA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Leakage current is growing remarkably in sub-100nm era and it will prevent system LSIs to suppress the powex dissipation. Such leakage current includes the sub-threshold leak and the gate-tunneling leak of MOS transistors. The leakage current will dominate the system LSIs' performance in the near future. Several low-power techniques are evaluated and issues are discussed from the view point of leakage reduction. The LSI design must become complicated when intellectual properties (IPs) are re-used for a highly functional and integrated system-in-a-package chip. Then the low-power techniques are requirec to be simple, unified and generalized. The power switch system corresponding to the IP design is suggested as a generalized technology. The simultaneous supply-voltage and body-bias control is discussed as a technology integration.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Sub-threshold leak / Gate-tunneling leak / Power switch / Body bias control / Supply voltage control
Paper # ICD2002-60
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Committee ICD
Conference Date 2002/8/15(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Very Low Power System LSI toward 0.1V Operation : Issues and solutions for low power circuit techniques
Sub Title (in English)
Keyword(1) Sub-threshold leak
Keyword(2) Gate-tunneling leak
Keyword(3) Power switch
Keyword(4) Body bias control
Keyword(5) Supply voltage control
1st Author's Name Masayuki MIYAZAKI
1st Author's Affiliation Hitachi, Ltd. Central Research Laboratory()
2nd Author's Name Goichi ONO
2nd Author's Affiliation Hitachi, Ltd. Central Research Laboratory
3rd Author's Name Takehiro SHIMIZU
3rd Author's Affiliation Hitachi, Ltd. Central Research Laboratory
4th Author's Name Yusuke KANNO
4th Author's Affiliation Hitachi, Ltd. Central Research Laboratory
5th Author's Name Takayuki KAWAHARA
5th Author's Affiliation Hitachi, Ltd. Central Research Laboratory
Date 2002/8/15
Paper # ICD2002-60
Volume (vol) vol.102
Number (no) 273
Page pp.pp.-
#Pages 6
Date of Issue